Date: Mon, 1 Oct 2007 05:53:22 GMT From: Warner Losh <imp@FreeBSD.org> To: Perforce Change Reviews <perforce@freebsd.org> Subject: PERFORCE change 127056 for review Message-ID: <200710010553.l915rMfO031331@repoman.freebsd.org>
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http://perforce.freebsd.org/chv.cgi?CH=127056 Change 127056 by imp@imp_paco-paco on 2007/10/01 05:52:50 We link now. Define the cpu_* routines that had been undefined in orion_machdep.c. Document this and some other random notes about the next steps for this port. I need to at least connect the serial port to the orion bus to get a good serial console. Fortunately, it appears that a 16550CF compatible interface is what's used on this part. Affected files ... .. //depot/projects/arm/src/sys/arm/orion/Orion-Port#3 edit .. //depot/projects/arm/src/sys/arm/orion/orion.c#3 edit .. //depot/projects/arm/src/sys/arm/orion/orion_machdep.c#3 edit Differences ... ==== //depot/projects/arm/src/sys/arm/orion/Orion-Port#3 (text+ko) ==== @@ -81,3 +81,22 @@ ../../../kern/kern_clock.c:389: undefined reference to `cpu_stopprofclock' ../../../kern/kern_clock.c:362: undefined reference to `cpu_startprofclock' ../../../kern/kern_shutdown.c:484: undefined reference to `cpu_reset' + +20070930: 23:30-23:45 +o Added dummy defines for the cpu_ functions from last entry to + orion_machdep.c. The at91 port has these in at91_st, which defines its + normal time keeping hardware. Maybe a move would be warranted after bit. +o Thought I needed to update the generic_bs_armv4 to v5 since this is an armv5 + processor. However, the armv4 macros are used in armv5 parts that NetBSD + supports, and there are no armv5 special macros. I've not looked the new + armv6 branch in NetBSD to see if there's anything necessary there or not. +o orion kernel now links. I doubt we'll get that far into arm_init(), and + there's likely some threading together of the init code that hasn't been put + in place yet as I've not quite worked out many of the details. Many of the + details will have to wait until I can get documentation on the memory map + for this part, or puzzle out same from the Orion2 linux patches that were + posted over the summer. +o kernel.bin can be loaded directly with the uboot boot loader that's on these + boards. Otherwise, mkimage needs to be run to put the right kind of header + onto the kernel. + ==== //depot/projects/arm/src/sys/arm/orion/orion.c#3 (text+ko) ==== @@ -102,8 +102,6 @@ bs_protos(generic); bs_protos(generic_armv4); -/* XXX likely need to use generic_armv5 in places */ - struct bus_space orion_bs_tag = { /* cookie */ (void *) 0, ==== //depot/projects/arm/src/sys/arm/orion/orion_machdep.c#3 (text+ko) ==== @@ -191,11 +191,63 @@ #endif void +cpu_initclocks(void) +{ +#if 0 + int rel_value; + struct resource *irq; + int rid = 0; + void *ih; + device_t dev = timer_softc->sc_dev; + + rel_value = 32768 / hz; + if (rel_value < 1) + rel_value = 1; + if (32768 % hz) { + printf("Cannot get %d Hz clock; using %dHz\n", hz, 32768 / rel_value); + hz = 32768 / rel_value; + tick = 1000000 / hz; + } + /* Disable all interrupts. */ + WR4(ST_IDR, 0xffffffff); + /* The system timer shares the system irq (1) */ + irq = bus_alloc_resource(dev, SYS_RES_IRQ, &rid, 1, 1, 1, + RF_ACTIVE | RF_SHAREABLE); + if (!irq) + panic("Unable to allocate irq for the system timer"); + else + bus_setup_intr(dev, irq, INTR_TYPE_CLK, + clock_intr, NULL, NULL, &ih); + + WR4(ST_PIMR, rel_value); + + /* Enable PITS interrupts. */ + WR4(ST_IER, ST_SR_PITS); + tc_init(&at91st_timecounter); +#endif +} +void DELAY(int us) { /* XXX write me */ } +void +cpu_startprofclock(void) +{ +} + +void +cpu_stopprofclock(void) +{ +} + +void +cpu_reset(void) +{ + /* XXX Write me */ +} + static long ramsize(void) {
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