Skip site navigation (1)Skip section navigation (2)
Date:      Sat, 28 Feb 1998 14:20:48 -0800 (PST)
From:      Archie Cobbs <archie@whistle.com>
To:        helbig@Informatik.BA-Stuttgart.DE (Wolfgang Helbig)
Cc:        freebsd-isdn@FreeBSD.ORG
Subject:   Re: AVM A1 Setup bug on NetBSD?
Message-ID:  <199802282220.OAA08206@bubba.whistle.com>
In-Reply-To: <199802281511.QAA00257@rvc1.informatik.ba-stuttgart.de> from Wolfgang Helbig at "Feb 28, 98 04:11:25 pm"

next in thread | previous in thread | raw e-mail | index | archive | help
Wolfgang Helbig writes:
> > > Feb 27 00:00:07 hal /netbsd: i4b-L2-i4b_tei_assign: tx TEI ID_Request
> > > Feb 27 00:00:08 hal /netbsd: i4b-L2-i4b_T202_timeout: unit 0, N202 = 3
> > > Feb 27 00:00:08 hal /netbsd: i4b-L2-i4b_tei_assign: tx TEI ID_Request
> > > Feb 27 00:00:09 hal /netbsd: i4b-L2-i4b_T202_timeout: unit 0, N202 = 3
> > > Feb 27 00:00:09 hal /netbsd: i4b-L2-i4b_tei_assign: tx TEI ID_Request
> > > Feb 27 00:00:10 hal /netbsd: i4b-L2-i4b_T202_timeout: unit 0, N202 = 3
> > 
> > Yes - this is very much likeley due to the interrupt handler not 
> > being called.
> 
> The same happened on a FreeBSD SMP system. The workaround was
> to MASK/UNMASK the ISAC/HSCX interrupts every time an ISAC command
> is issued (see layer1/i4b_isac.c)

Sounds like a case of the chip generating a level-sensitive interrupt
and the board needing an edge. If a new interrupt becomes pending
while you're in your interrupt routine, but before you've cleared
the old interrupt condition, you must generate a new edge by masking
and then unmasking all interrupts.

Just a guess..

-Archie

___________________________________________________________________________
Archie Cobbs   *   Whistle Communications, Inc.  *   http://www.whistle.com

To Unsubscribe: send mail to majordomo@FreeBSD.org
with "unsubscribe freebsd-isdn" in the body of the message



Want to link to this message? Use this URL: <https://mail-archive.FreeBSD.org/cgi/mid.cgi?199802282220.OAA08206>