Date: Fri, 31 Mar 2017 16:05:07 +0200 From: Marcin Wojtas <mw@semihalf.com> To: freebsd-arm@freebsd.org Subject: Re: Coherent bus_dma for ARMv7 Message-ID: <CAPv3WKcG_Y=5zPk-2vGbQfCpiNcWvuUymY8EHRnWsM2FUzcG4Q@mail.gmail.com> In-Reply-To: <CAPv3WKejupH4JG1=_XV6PknnKifxbF0qoVubtMRVtZWEoBZ7xg@mail.gmail.com> References: <CAPv3WKejupH4JG1=_XV6PknnKifxbF0qoVubtMRVtZWEoBZ7xg@mail.gmail.com>
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--001a113ec89c0de2a2054c074ca8 Content-Type: text/plain; charset=UTF-8 Patch with the coherent bus_dma support attached. Marcin 2017-03-31 16:01 GMT+02:00 Marcin Wojtas <mw@semihalf.com>: > Hi, > > In current FreeBSD-HEAD ARMv7 platforms, which support hardware IO > cache coherency cannot make use of this feature. In our project we > implemented coherent variant bus_dma, which is basing on x86 and arm64 > approach. Using of above solution is not obligatory and depends on > setting newly added option for that purpose. > > Needless to say, our platform (Marvell Armada 38x) IO performance > boosted after switching to it. Do you wish to enable such option in > HEAD? > > Regards, > Marcin --001a113ec89c0de2a2054c074ca8 Content-Type: application/octet-stream; name="0001-Introduce-preliminary-version-of-coherent-DMA-for-AR.patch" Content-Disposition: attachment; filename="0001-Introduce-preliminary-version-of-coherent-DMA-for-AR.patch" Content-Transfer-Encoding: base64 X-Attachment-Id: f_j0xwi9m40 RnJvbSBlMjJiZTYzNTQ0MGEwYzNiNWY3OTdjMmNkNGNkOThmODUxNmMyZjE1IE1vbiBTZXAgMTcg MDA6MDA6MDAgMjAwMQpGcm9tOiBaYmlnbmlldyBCb2RlayA8emJiQHNlbWloYWxmLmNvbT4KRGF0 ZTogV2VkLCAyNCBBdWcgMjAxNiAyMTowMTowOSArMDIwMApTdWJqZWN0OiBbUEFUQ0hdIEludHJv ZHVjZSBwcmVsaW1pbmFyeSB2ZXJzaW9uIG9mIGNvaGVyZW50IERNQSBmb3IgQVJNCgotIEJhc2Vk IG9uIHg4NiBpbXBsZW1lbnRhdGlvbiB3aXRoIGJ1c19kbWFtYXBfc3luYygpCiAgaW5zcGlyZWQg YnkgYXJtNjQgb25lLgotIE5vdCBzdXJlIHdoeSBEU0Igd2FzIHVzZWQgaW5zdGVhZCBvZiBETUIg YnV0IHRoaXMgc2hvdWxkCiAgbm90IGNhdXNlIGFueSBpbXBhY3Qgb24gZGF0YSB2YWxpZGl0eSBi dXQgcmF0aGVyIG9uIHNwZWVkLgotLS0KIHN5cy9hcm0vYXJtL2J1c2RtYV9ib3VuY2UuYyAgICAg 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