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Date:      Mon, 29 Jul 2019 09:25:17 +0000 (UTC)
From:      Andrew Rybchenko <arybchik@FreeBSD.org>
To:        src-committers@freebsd.org, svn-src-all@freebsd.org, svn-src-stable@freebsd.org, svn-src-stable-12@freebsd.org
Subject:   svn commit: r350405 - in stable/12/sys/dev/sfxge: . common
Message-ID:  <201907290925.x6T9PHQJ000644@repo.freebsd.org>

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Author: arybchik
Date: Mon Jul 29 09:25:16 2019
New Revision: 350405
URL: https://svnweb.freebsd.org/changeset/base/350405

Log:
  MFC r350369
  
  sfxge(4): fix power of 2 round up when align has smaller type
  
  Substitute driver-defined P2ROUNDUP() h with EFX_P2ROUNDUP()
  defined in libefx.
  
  Cast value and alignment to one specified type to guarantee result
  correctness.
  
  Reported by:    Andrea Valsania <andrea.valsania at answervad.it>
  Sponsored by:   Solarflare Communications, Inc.

Modified:
  stable/12/sys/dev/sfxge/common/ef10_nvram.c
  stable/12/sys/dev/sfxge/common/efsys.h
  stable/12/sys/dev/sfxge/common/efx.h
  stable/12/sys/dev/sfxge/common/efx_mcdi.h
  stable/12/sys/dev/sfxge/common/efx_tx.c
  stable/12/sys/dev/sfxge/sfxge_rx.c
Directory Properties:
  stable/12/   (props changed)

Modified: stable/12/sys/dev/sfxge/common/ef10_nvram.c
==============================================================================
--- stable/12/sys/dev/sfxge/common/ef10_nvram.c	Mon Jul 29 09:19:48 2019	(r350404)
+++ stable/12/sys/dev/sfxge/common/ef10_nvram.c	Mon Jul 29 09:25:16 2019	(r350405)
@@ -394,7 +394,8 @@ tlv_write(
 	if (len > 0) {
 		ptr[(len - 1) / sizeof (uint32_t)] = 0;
 		memcpy(ptr, data, len);
-		ptr += P2ROUNDUP(len, sizeof (uint32_t)) / sizeof (*ptr);
+		ptr += EFX_P2ROUNDUP(uint32_t, len,
+		    sizeof (uint32_t)) / sizeof (*ptr);
 	}
 
 	return (ptr);

Modified: stable/12/sys/dev/sfxge/common/efsys.h
==============================================================================
--- stable/12/sys/dev/sfxge/common/efsys.h	Mon Jul 29 09:19:48 2019	(r350404)
+++ stable/12/sys/dev/sfxge/common/efsys.h	Mon Jul 29 09:25:16 2019	(r350405)
@@ -93,10 +93,6 @@ extern "C" {
 #define	IS_P2ALIGNED(v, a)	((((uintptr_t)(v)) & ((uintptr_t)(a) - 1)) == 0)
 #endif
 
-#ifndef P2ROUNDUP
-#define	P2ROUNDUP(x, align)	(-(-(x) & -(align)))
-#endif
-
 #ifndef P2ALIGN
 #define	P2ALIGN(_x, _a)		((_x) & -(_a))
 #endif

Modified: stable/12/sys/dev/sfxge/common/efx.h
==============================================================================
--- stable/12/sys/dev/sfxge/common/efx.h	Mon Jul 29 09:19:48 2019	(r350404)
+++ stable/12/sys/dev/sfxge/common/efx.h	Mon Jul 29 09:25:16 2019	(r350405)
@@ -52,6 +52,10 @@ extern "C" {
 #define	EFX_FIELD_OFFSET(_type, _field)		\
 	((size_t) &(((_type *)0)->_field))
 
+/* Round value up to the nearest power of two. */
+#define	EFX_P2ROUNDUP(_type, _value, _align)	\
+	(-(-(_type)(_value) & -(_type)(_align)))
+
 /* Return codes */
 
 typedef __success(return == 0) int efx_rc_t;
@@ -451,10 +455,10 @@ typedef enum efx_link_mode_e {
 	    + /* bug16011 */ 16)				\
 
 #define	EFX_MAC_PDU(_sdu)					\
-	P2ROUNDUP((_sdu) + EFX_MAC_PDU_ADJUSTMENT, 8)
+	EFX_P2ROUNDUP(size_t, (_sdu) + EFX_MAC_PDU_ADJUSTMENT, 8)
 
 /*
- * Due to the P2ROUNDUP in EFX_MAC_PDU(), EFX_MAC_SDU_FROM_PDU() may give
+ * Due to the EFX_P2ROUNDUP in EFX_MAC_PDU(), EFX_MAC_SDU_FROM_PDU() may give
  * the SDU rounded up slightly.
  */
 #define	EFX_MAC_SDU_FROM_PDU(_pdu)	((_pdu) - EFX_MAC_PDU_ADJUSTMENT)
@@ -540,8 +544,9 @@ efx_mac_stat_name(
 
 #define	EFX_MAC_STATS_MASK_BITS_PER_PAGE	(8 * sizeof (uint32_t))
 
-#define	EFX_MAC_STATS_MASK_NPAGES	\
-	(P2ROUNDUP(EFX_MAC_NSTATS, EFX_MAC_STATS_MASK_BITS_PER_PAGE) / \
+#define	EFX_MAC_STATS_MASK_NPAGES				\
+	(EFX_P2ROUNDUP(uint32_t, EFX_MAC_NSTATS,		\
+		       EFX_MAC_STATS_MASK_BITS_PER_PAGE) /	\
 	    EFX_MAC_STATS_MASK_BITS_PER_PAGE)
 
 /*

Modified: stable/12/sys/dev/sfxge/common/efx_mcdi.h
==============================================================================
--- stable/12/sys/dev/sfxge/common/efx_mcdi.h	Mon Jul 29 09:19:48 2019	(r350404)
+++ stable/12/sys/dev/sfxge/common/efx_mcdi.h	Mon Jul 29 09:25:16 2019	(r350405)
@@ -395,6 +395,11 @@ efx_mcdi_phy_module_get_info(
 	(((mask) & (MC_CMD_PRIVILEGE_MASK_IN_GRP_ ## priv)) ==		\
 	(MC_CMD_PRIVILEGE_MASK_IN_GRP_ ## priv))
 
+#define	EFX_MCDI_BUF_SIZE(_in_len, _out_len)				\
+	EFX_P2ROUNDUP(size_t,						\
+		MAX(MAX(_in_len, _out_len), (2 * sizeof (efx_dword_t))),\
+		sizeof (efx_dword_t))
+
 /*
  * The buffer size must be a multiple of dword to ensure that MCDI works
  * properly with Siena based boards (which use on-chip buffer). Also, it
@@ -402,9 +407,7 @@ efx_mcdi_phy_module_get_info(
  * error responses if the request/response buffer sizes are smaller.
  */
 #define EFX_MCDI_DECLARE_BUF(_name, _in_len, _out_len)			\
-	uint8_t _name[P2ROUNDUP(MAX(MAX(_in_len, _out_len),		\
-				    (2 * sizeof (efx_dword_t))),	\
-				sizeof (efx_dword_t))] = {0}
+	uint8_t _name[EFX_MCDI_BUF_SIZE(_in_len, _out_len)] = {0}
 
 typedef enum efx_mcdi_feature_id_e {
 	EFX_MCDI_FEATURE_FW_UPDATE = 0,

Modified: stable/12/sys/dev/sfxge/common/efx_tx.c
==============================================================================
--- stable/12/sys/dev/sfxge/common/efx_tx.c	Mon Jul 29 09:19:48 2019	(r350404)
+++ stable/12/sys/dev/sfxge/common/efx_tx.c	Mon Jul 29 09:25:16 2019	(r350405)
@@ -772,7 +772,7 @@ siena_tx_qpost(
 		 * Fragments must not span 4k boundaries.
 		 * Here it is a stricter requirement than the maximum length.
 		 */
-		EFSYS_ASSERT(P2ROUNDUP(start + 1,
+		EFSYS_ASSERT(EFX_P2ROUNDUP(efsys_dma_addr_t, start + 1,
 		    etp->et_enp->en_nic_cfg.enc_tx_dma_desc_boundary) >= end);
 
 		EFX_TX_DESC(etp, start, size, ebp->eb_eop, added);
@@ -1046,7 +1046,7 @@ siena_tx_qdesc_dma_create(
 	 * Fragments must not span 4k boundaries.
 	 * Here it is a stricter requirement than the maximum length.
 	 */
-	EFSYS_ASSERT(P2ROUNDUP(addr + 1,
+	EFSYS_ASSERT(EFX_P2ROUNDUP(efsys_dma_addr_t, addr + 1,
 	    etp->et_enp->en_nic_cfg.enc_tx_dma_desc_boundary) >= addr + size);
 
 	EFSYS_PROBE4(tx_desc_dma_create, unsigned int, etp->et_index,

Modified: stable/12/sys/dev/sfxge/sfxge_rx.c
==============================================================================
--- stable/12/sys/dev/sfxge/sfxge_rx.c	Mon Jul 29 09:19:48 2019	(r350404)
+++ stable/12/sys/dev/sfxge/sfxge_rx.c	Mon Jul 29 09:25:16 2019	(r350405)
@@ -273,7 +273,8 @@ sfxge_rx_qfill(struct sfxge_rxq *rxq, unsigned int tar
 
 		/* m_len specifies length of area to be mapped for DMA */
 		m->m_len  = mblksize;
-		m->m_data = (caddr_t)P2ROUNDUP((uintptr_t)m->m_data, CACHE_LINE_SIZE);
+		m->m_data = (caddr_t)EFX_P2ROUNDUP(uintptr_t, m->m_data,
+						   CACHE_LINE_SIZE);
 		m->m_data += sc->rx_buffer_align;
 
 		sfxge_map_mbuf_fast(rxq->mem.esm_tag, rxq->mem.esm_map, m, &seg);
@@ -1103,14 +1104,14 @@ sfxge_rx_start(struct sfxge_softc *sc)
 
 	/* Ensure IP headers are 32bit aligned */
 	hdrlen = sc->rx_prefix_size + sizeof (struct ether_header);
-	sc->rx_buffer_align = P2ROUNDUP(hdrlen, 4) - hdrlen;
+	sc->rx_buffer_align = EFX_P2ROUNDUP(size_t, hdrlen, 4) - hdrlen;
 
 	sc->rx_buffer_size += sc->rx_buffer_align;
 
 	/* Align end of packet buffer for RX DMA end padding */
 	align = MAX(1, encp->enc_rx_buf_align_end);
 	EFSYS_ASSERT(ISP2(align));
-	sc->rx_buffer_size = P2ROUNDUP(sc->rx_buffer_size, align);
+	sc->rx_buffer_size = EFX_P2ROUNDUP(size_t, sc->rx_buffer_size, align);
 
 	/*
 	 * Standard mbuf zones only guarantee pointer-size alignment;



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