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Date:      Tue, 23 Mar 2021 22:00:19 GMT
From:      Brandon Bergren <bdragon@FreeBSD.org>
To:        src-committers@FreeBSD.org, dev-commits-src-all@FreeBSD.org, dev-commits-src-branches@FreeBSD.org
Subject:   git: 064f09616c67 - releng/13.0 - [PowerPC64] Fix multiple issues in fpsetmask().
Message-ID:  <202103232200.12NM0Jah014687@gitrepo.freebsd.org>

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The branch releng/13.0 has been updated by bdragon:

URL: https://cgit.FreeBSD.org/src/commit/?id=064f09616c6745e96321313a6bebe0872f242eac

commit 064f09616c6745e96321313a6bebe0872f242eac
Author:     Brandon Bergren <bdragon@FreeBSD.org>
AuthorDate: 2021-03-01 02:35:53 +0000
Commit:     Brandon Bergren <bdragon@FreeBSD.org>
CommitDate: 2021-03-23 21:50:14 +0000

    [PowerPC64] Fix multiple issues in fpsetmask().
    
    Building R exposed a problem in fpsetmask() whereby we were not properly
    clamping the provided mask to the valid range.
    
    R initilizes the mask by calling fpsetmask(~0) on FreeBSD. Since we
    recently enabled precise exceptions, this was causing an immediate
    SIGFPE because we were attempting to set invalid bits in the fpscr.
    
    Properly limit the range of bits that can be set via fpsetmask().
    
    While here, use the correct fp_except_t type instead of fp_rnd_t.
    
    Reported by:    pkubaj (in IRC)
    Sponsored by:   Tag1 Consulting, Inc.
    Approved by:    re (gjb) (Post-RC3 outstanding request approved for RC4)
    
    (cherry picked from commit dd95b39235dd81c890aa3cce02a5bb7f91f23803)
    (cherry picked from commit a79735386c46298274d71577ab6b4dd00be261cc)
---
 lib/libc/powerpc64/gen/fpsetmask.c | 6 +++---
 1 file changed, 3 insertions(+), 3 deletions(-)

diff --git a/lib/libc/powerpc64/gen/fpsetmask.c b/lib/libc/powerpc64/gen/fpsetmask.c
index 4d63552470be..f5d52eec5482 100644
--- a/lib/libc/powerpc64/gen/fpsetmask.c
+++ b/lib/libc/powerpc64/gen/fpsetmask.c
@@ -43,11 +43,11 @@ fp_except_t
 fpsetmask(fp_except_t mask)
 {
 	u_int64_t fpscr;
-	fp_rnd_t old;
+	fp_except_t old;
 
 	__asm__("mffs %0" : "=f"(fpscr));
-	old = (fp_rnd_t)((fpscr >> 3) & 0x1f);
-	fpscr = (fpscr & 0xffffff07) | (mask << 3);
+	old = (fp_except_t)((fpscr >> 3) & 0x1f);
+	fpscr = (fpscr & 0xffffff07) | ((mask & 0x1f) << 3);
 	__asm__ __volatile("mtfsf 0xff,%0" :: "f"(fpscr));
 	return (old);
 }



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