Date: Wed, 01 May 1996 22:43:29 -0400 From: "Louis A. Mamakos" <louie@TransSys.COM> To: Luigi Rizzo <luigi@labinfo.iet.unipi.it> Cc: hackers@freebsd.org Subject: Re: Fast IP/TCP checksums ? Message-ID: <199605020243.WAA15163@whizzo.transsys.com> In-Reply-To: Your message of "Wed, 01 May 1996 14:54:46 %2B0200." <199605011254.OAA08931@labinfo.iet.unipi.it> References: <199605011254.OAA08931@labinfo.iet.unipi.it>
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If you recall that 1's complement arithmetic uses end-around-carry (that is, a carry from the high-order bit is added back into the low order bit), then you can see why the byte-ordering isn't an issue. Or at least you can convice yourself with a little bit of deep thought and some beer. If you do arithmetic with 32 bit operations, you need to be able to capture the carry off the end of the 32 bit register and do the end around carry. If you do this in assembly code, you ought to be able to look at the carry bit in the condition code register/PSW/whatever and add it back in. Of course, if you had a 1's complement CPU, you wouldn't have this problem. You may just have different ones.. I've got an IP checksum routing written in UNIVAC 1100 assembly code (http://www.transsys.com/~louie/ip-tcp-1100/CHECKSUM:MSM) that has to worry about 36 bit words (8 bit bytes in aligned in the low 8 bits of the 9 bit quarter words..) louie > Hi, > > I was looking at TCP/IP checksums recently. > > Can someone explain why IP/TCP checksums can be computed using the > same algorithm on both big-endian and little-endian systems, yet produce > the same result (after a final ntohs() of course) ? > > It surely has to do with the fact that the representations of 0 in > 1's complement have the same low & high bytes, but I haven't been able > to find a formal proof of why it works. > > Besides (hence the Subject for this message) it appears that you can > compute checksums using 32-bit sums and yet produce the same result! > This could save something in the computation of checksums, as you need > half as many adds, and much less data movements as all operands are > 32-bit aligned. > > Luigi > ==================================================================== > Luigi Rizzo Dip. di Ingegneria dell'Informazione > email: luigi@iet.unipi.it Universita' di Pisa > tel: +39-50-568533 via Diotisalvi 2, 56126 PISA (Italy) > fax: +39-50-568522 http://www.iet.unipi.it/~luigi/ > ====================================================================
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