Date: Sat, 1 Apr 2017 18:52:49 +0000 (UTC) From: Justin Hibbits <jhibbits@FreeBSD.org> To: src-committers@freebsd.org, svn-src-all@freebsd.org, svn-src-stable@freebsd.org, svn-src-stable-11@freebsd.org Subject: svn commit: r316367 - stable/11/sys/powerpc/ofw Message-ID: <201704011852.v31IqnIk020727@repo.freebsd.org>
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Author: jhibbits Date: Sat Apr 1 18:52:48 2017 New Revision: 316367 URL: https://svnweb.freebsd.org/changeset/base/316367 Log: MFC r314885: Fix booting with >4GB RAM on PowerMac G5 hardware === From Nathan Whitehorn: Open Firmware runs in virtual mode on the Powermac G5. This runs inside the kernel page table, which preserves all address translations made by OF before the kernel starts; as a result, the kernel address space is a strict superset of OF's. Where this explodes is if OF uses an unmapped SLB entry. The SLB fault handler runs in real mode and refers to the PCPU pointer in SPRG0, which blows up the kernel. Having a value of SPRG0 that works for the kernel is less fatal than preserving OF's value in this case. === The result of this is seemingly random panics from NULL dereferences, or hangs immediately upon boot. By not restoring SPRG0 for Open Firmware entry the kernel PCPU pointer is preserved and SLB faults are successful, resulting in a stable kernel. PR: 205458 Modified: stable/11/sys/powerpc/ofw/ofw_machdep.c Directory Properties: stable/11/ (props changed) Modified: stable/11/sys/powerpc/ofw/ofw_machdep.c ============================================================================== --- stable/11/sys/powerpc/ofw/ofw_machdep.c Sat Apr 1 17:15:53 2017 (r316366) +++ stable/11/sys/powerpc/ofw/ofw_machdep.c Sat Apr 1 18:52:48 2017 (r316367) @@ -111,6 +111,15 @@ ofw_sprg_prepare(void) * Assume that interrupt are disabled at this point, or * SPRG1-3 could be trashed */ +#ifdef __powerpc64__ + __asm __volatile("mtsprg1 %0\n\t" + "mtsprg2 %1\n\t" + "mtsprg3 %2\n\t" + : + : "r"(ofmsr[2]), + "r"(ofmsr[3]), + "r"(ofmsr[4])); +#else __asm __volatile("mfsprg0 %0\n\t" "mtsprg0 %1\n\t" "mtsprg1 %2\n\t" @@ -121,6 +130,7 @@ ofw_sprg_prepare(void) "r"(ofmsr[2]), "r"(ofmsr[3]), "r"(ofmsr[4])); +#endif } static __inline void @@ -136,7 +146,9 @@ ofw_sprg_restore(void) * * PCPU data cannot be used until this routine is called ! */ +#ifndef __powerpc64__ __asm __volatile("mtsprg0 %0" :: "r"(ofw_sprg0_save)); +#endif } #endif @@ -344,8 +356,9 @@ OF_initial_setup(void *fdt_ptr, void *ju ofmsr[0] = mfmsr(); #ifdef __powerpc64__ ofmsr[0] &= ~PSL_SF; - #endif + #else __asm __volatile("mfsprg0 %0" : "=&r"(ofmsr[1])); + #endif __asm __volatile("mfsprg1 %0" : "=&r"(ofmsr[2])); __asm __volatile("mfsprg2 %0" : "=&r"(ofmsr[3])); __asm __volatile("mfsprg3 %0" : "=&r"(ofmsr[4]));
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