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Date:      Wed, 17 Aug 2011 06:21:34 +0000 (UTC)
From:      Adrian Chadd <adrian@FreeBSD.org>
To:        src-committers@freebsd.org, svn-src-user@freebsd.org
Subject:   svn commit: r224926 - user/adrian/if_ath_tx/sys/dev/ath
Message-ID:  <201108170621.p7H6LYF3090372@svn.freebsd.org>

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Author: adrian
Date: Wed Aug 17 06:21:34 2011
New Revision: 224926
URL: http://svn.freebsd.org/changeset/base/224926

Log:
  Modify how/when the frame descriptor is being setup.
  
  For packets being immediately queued to the hardware, setup the
  descriptor before handing it off to the hardware.
  
  For packets being queued to the per-TID software queue, defer
  setting up the descriptor details (setup, rate control, chaining)
  until the packet is about to be queued to the hardware.
  
  This way, packet aggregation (RIFS burst, A-MPDU) can setup
  the descriptor list as needed.
  
  The only downside at the moment is that the rate control decision
  is done (very) early on. I'll fix this at a later stage so software
  retries can use different rates as needed.

Modified:
  user/adrian/if_ath_tx/sys/dev/ath/if_ath_tx.c

Modified: user/adrian/if_ath_tx/sys/dev/ath/if_ath_tx.c
==============================================================================
--- user/adrian/if_ath_tx/sys/dev/ath/if_ath_tx.c	Wed Aug 17 03:44:47 2011	(r224925)
+++ user/adrian/if_ath_tx/sys/dev/ath/if_ath_tx.c	Wed Aug 17 06:21:34 2011	(r224926)
@@ -1155,19 +1155,6 @@ ath_tx_start(struct ath_softc *sc, struc
 	/* At this point m0 could have changed! */
 	m0 = bf->bf_m;
 
-	/*
-	 * Formulate first tx descriptor with tx controls.
-	 */
-	ath_tx_setds(sc, bf);
-
-	/*
-	 * Setup rate control series.
-	 */
-	ath_tx_set_ratectrl(sc, ni, bf);
-
-	/* Fill in the details in the descriptor list */
-	ath_tx_chaindesclist(sc, bf);
-
 #if 1
 	/*
 	 * If it's a multicast frame, do a direct-dispatch to the
@@ -1179,9 +1166,16 @@ ath_tx_start(struct ath_softc *sc, struc
 	 * destination hardware queue. Don't bother software
 	 * queuing it, as the TID will now be paused.
 	 */
-	if (ismcast)
-		ath_tx_handoff_mcast(sc, txq, bf);
-	else if (type == IEEE80211_FC0_TYPE_CTL &&
+	if (ismcast) {
+		/* Setup the descriptor before handoff */
+		ath_tx_setds(sc, bf);
+		ath_tx_set_ratectrl(sc, ni, bf);
+		ath_tx_chaindesclist(sc, bf);
+
+		ATH_TXQ_LOCK(txq);
+		ath_tx_handoff(sc, txq, bf);
+		ATH_TXQ_UNLOCK(txq);
+	} else if (type == IEEE80211_FC0_TYPE_CTL &&
 		    subtype == IEEE80211_FC0_SUBTYPE_BAR) {
 		/*
 		 * XXX The following is dirty but needed for now.
@@ -1197,6 +1191,12 @@ ath_tx_start(struct ath_softc *sc, struc
 		 */
 		DPRINTF(sc, ATH_DEBUG_SW_TX_CTRL,
 		    "%s: BAR: TX'ing direct\n", __func__);
+
+		/* Setup the descriptor before handoff */
+		ath_tx_setds(sc, bf);
+		ath_tx_set_ratectrl(sc, ni, bf);
+		ath_tx_chaindesclist(sc, bf);
+
 		ATH_TXQ_LOCK(txq);
 		ath_tx_handoff(sc, txq, bf);
 		ATH_TXQ_UNLOCK(txq);
@@ -1212,6 +1212,12 @@ ath_tx_start(struct ath_softc *sc, struc
 	 * For now, since there's no software queue,
 	 * direct-dispatch to the hardware.
 	 */
+
+	/* Setup the descriptor before handoff */
+	ath_tx_setds(sc, bf);
+	ath_tx_set_ratectrl(sc, ni, bf);
+	ath_tx_chaindesclist(sc, bf);
+
 	ATH_TXQ_LOCK(txq);
 	ath_tx_handoff(sc, txq, bf);
 	ATH_TXQ_UNLOCK(txq);
@@ -1383,12 +1389,6 @@ ath_tx_raw_start(struct ath_softc *sc, s
 		bf->bf_state.bfs_rc[3].tries = params->ibp_try3;
 	}
 
-	/* Program the descriptor */
-	ath_tx_setds(sc, bf);
-
-	/* Program the rate control series */
-	ath_tx_set_ratectrl(sc, ni, bf);
-
 	/* NB: no buffered multicast in power save support */
 
 	/* XXX If it's an ADDBA, override the correct queue */
@@ -1404,9 +1404,6 @@ ath_tx_raw_start(struct ath_softc *sc, s
 		pri = TID_TO_WME_AC(o_tid);
 	}
 
-	/* Fill in the details in the descriptor list */
-	ath_tx_chaindesclist(sc, bf);
-
 	/*
 	 * If we're overiding the ADDBA destination, dump directly
 	 * into the hardware queue, right after any pending
@@ -1415,6 +1412,9 @@ ath_tx_raw_start(struct ath_softc *sc, s
 
 	if (do_override) {
 		ATH_TXQ_LOCK(sc->sc_ac2q[pri]);
+		ath_tx_setds(sc, bf);
+		ath_tx_set_ratectrl(sc, ni, bf);
+		ath_tx_chaindesclist(sc, bf);
 		ath_tx_handoff(sc, sc->sc_ac2q[pri], bf);
 		ATH_TXQ_UNLOCK(sc->sc_ac2q[pri]);
 	}
@@ -2312,6 +2312,7 @@ ath_tx_tid_hw_queue_aggr(struct ath_soft
 	struct ath_txq *txq;
 	struct ath_tid *atid = &an->an_tid[tid];
 	struct ieee80211_tx_ampdu *tap;
+	struct ieee80211_node *ni = &an->an_node;
 
 	DPRINTF(sc, ATH_DEBUG_SW_TX, "%s: tid=%d\n", __func__, tid);
 
@@ -2378,6 +2379,11 @@ ath_tx_tid_hw_queue_aggr(struct ath_soft
 		if (bf->bf_state.bfs_tid == IEEE80211_NONQOS_TID)
 			device_printf(sc->sc_dev, "%s: TID=16?\n", __func__);
 
+		/* Program descriptor */
+		ath_tx_setds(sc, bf);
+		ath_tx_set_ratectrl(sc, ni, bf);
+		ath_tx_chaindesclist(sc, bf);
+
 		/* Punt to hardware or software txq */
 		ATH_TXQ_LOCK(txq);
 		ath_tx_handoff(sc, txq, bf);
@@ -2394,6 +2400,7 @@ ath_tx_tid_hw_queue_norm(struct ath_soft
 	struct ath_buf *bf;
 	struct ath_txq *txq;
 	struct ath_tid *atid = &an->an_tid[tid];
+	struct ieee80211_node *ni = &an->an_node;
 
 	DPRINTF(sc, ATH_DEBUG_SW_TX, "%s: node %p: TID %d: called\n",
 	    __func__, an, tid);
@@ -2427,6 +2434,11 @@ ath_tx_tid_hw_queue_norm(struct ath_soft
 		/* Normal completion handler */
 		bf->bf_comp = ath_tx_normal_comp;
 
+		/* Program descriptor */
+		ath_tx_setds(sc, bf);
+		ath_tx_set_ratectrl(sc, ni, bf);
+		ath_tx_chaindesclist(sc, bf);
+
 		/* Punt to hardware or software txq */
 		ATH_TXQ_LOCK(txq);
 		ath_tx_handoff(sc, txq, bf);



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