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Date:      Thu, 19 Apr 2001 13:45:36 -0700 (PDT)
From:      Linh Pham <lplist@closedsrc.org>
To:        Vincent Poy <vince@oahu.WURLDLINK.NET>
Cc:        Jeremiah Gowdy <jgowdy@home.com>, Charles Burns <burnscharlesn@hotmail.com>, <kris@obsecurity.org>, <mwlist@lanfear.com>, <freebsd@sysmach.com>, <questions@FreeBSD.ORG>
Subject:   Re: the AMD factor in FreeBSD
Message-ID:  <Pine.BSF.4.33.0104191339210.49251-100000@q.closedsrc.org>
In-Reply-To: <Pine.BSF.4.31.0104191041081.4840-100000@oahu.WURLDLINK.NET>

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On 2001-04-19, Vincent Poy scribbled:

# 	Somehow I thought the Intel and AMD x86 CPUs were CISC and had a
# portion that was RISC.

AMD uses their RISC86 engine to turn crummy x86 instructions into
RISC-like instructions to crunch them more efficiently as it can. The
Pentium III processors do something like that since the P6 core, but the
original P6 core sucked at 16-bit code... so Intel had to reduce the
optimizations in the Out-of-Order engine to increase 16-bit performance
in the Pentium II.

In reality... the x86 processors and, what people tend to call, RISC
processors now are really post-RISC. Trying to expand IPC and increase
Mhz :) Intel went the opposite with the P4.

-- 
Linh Pham
[lplist@closedsrc.org]

// 404b - Brain not found


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