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Date:      Wed, 11 Mar 2009 01:57:20 +0000 (UTC)
From:      Robert Noland <rnoland@FreeBSD.org>
To:        src-committers@freebsd.org, svn-src-all@freebsd.org, svn-src-stable@freebsd.org, svn-src-stable-7@freebsd.org
Subject:   svn commit: r189667 - in stable/7/sys: . contrib/pf dev/ath/ath_hal dev/cxgb dev/drm
Message-ID:  <200903110157.n2B1vKH8080303@svn.freebsd.org>

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Author: rnoland
Date: Wed Mar 11 01:57:20 2009
New Revision: 189667
URL: http://svn.freebsd.org/changeset/base/189667

Log:
  Merge r189051
  
  Prepare the radeon driver for MSI support.

Modified:
  stable/7/sys/   (props changed)
  stable/7/sys/contrib/pf/   (props changed)
  stable/7/sys/dev/ath/ath_hal/   (props changed)
  stable/7/sys/dev/cxgb/   (props changed)
  stable/7/sys/dev/drm/radeon_irq.c

Modified: stable/7/sys/dev/drm/radeon_irq.c
==============================================================================
--- stable/7/sys/dev/drm/radeon_irq.c	Wed Mar 11 01:56:17 2009	(r189666)
+++ stable/7/sys/dev/drm/radeon_irq.c	Wed Mar 11 01:57:20 2009	(r189667)
@@ -192,6 +192,7 @@ irqreturn_t radeon_driver_irq_handler(DR
 	    (drm_radeon_private_t *) dev->dev_private;
 	u32 stat;
 	u32 r500_disp_int;
+	u32 tmp;
 
 	/* Only consider the bits we're interested in - others could be used
 	 * outside the DRM
@@ -218,6 +219,33 @@ irqreturn_t radeon_driver_irq_handler(DR
 		if (stat & RADEON_CRTC2_VBLANK_STAT)
 			drm_handle_vblank(dev, 1);
 	}
+	if (dev->msi_enabled) {
+		switch(dev_priv->flags & RADEON_FAMILY_MASK) {
+			case CHIP_RS400:
+			case CHIP_RS480:
+				tmp = RADEON_READ(RADEON_AIC_CNTL) &
+				    ~RS400_MSI_REARM;
+				RADEON_WRITE(RADEON_AIC_CNTL, tmp);
+				RADEON_WRITE(RADEON_AIC_CNTL,
+				    tmp | RS400_MSI_REARM);
+				break;
+			case CHIP_RS690:
+			case CHIP_RS740:
+				tmp = RADEON_READ(RADEON_BUS_CNTL) &
+				    ~RS600_MSI_REARM;
+				RADEON_WRITE(RADEON_BUS_CNTL, tmp);
+				RADEON_WRITE(RADEON_BUS_CNTL, tmp |
+				    RS600_MSI_REARM);
+				break;
+			 default:
+				tmp = RADEON_READ(RADEON_MSI_REARM_EN) &
+				    ~RV370_MSI_REARM_EN;
+				RADEON_WRITE(RADEON_MSI_REARM_EN, tmp);
+				RADEON_WRITE(RADEON_MSI_REARM_EN,
+				    tmp | RV370_MSI_REARM_EN);
+				break;
+		}
+	}
 	return IRQ_HANDLED;
 }
 



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