Date: 23 Jul 2003 12:48:00 -0000 From: Przemyslaw Frasunek <venglin@freebsd.lublin.pl> To: FreeBSD-gnats-submit@FreeBSD.org Subject: i386/54781: ACPI prevents psm to detect on Compaq Evo laptop Message-ID: <20030723124800.35844.qmail@lagoon.freebsd.lublin.pl> Resent-Message-ID: <200307231250.h6NCoJwO054358@freefall.freebsd.org>
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>Number: 54781
>Category: i386
>Synopsis: ACPI prevents psm to detect on Compaq Evo laptop
>Confidential: no
>Severity: serious
>Priority: medium
>Responsible: freebsd-i386
>State: open
>Quarter:
>Keywords:
>Date-Required:
>Class: sw-bug
>Submitter-Id: current-users
>Arrival-Date: Wed Jul 23 05:50:18 PDT 2003
>Closed-Date:
>Last-Modified:
>Originator: Przemyslaw Frasunek
>Release: FreeBSD 5.1-RELEASE i386
>Organization:
ATM S.A.
>Environment:
Compaq Evo N1015v, FreeBSD 5.1-RELEASE.
dmesg output:
Copyright (c) 1992-2003 The FreeBSD Project.
Copyright (c) 1979, 1980, 1983, 1986, 1988, 1989, 1991, 1992, 1993, 1994
The Regents of the University of California. All rights reserved.
FreeBSD 5.1-RELEASE #0: Thu Jun 5 02:55:42 GMT 2003
root@wv1u.btc.adaptec.com:/usr/obj/usr/src/sys/GENERIC
Preloaded elf kernel "/boot/kernel/kernel" at 0xc06d4000.
Preloaded elf module "/boot/kernel/acpi.ko" at 0xc06d421c.
Calibrating clock(s) ... i8254 clock: 1193184 Hz
CLK_USE_I8254_CALIBRATION not specified - using default frequency
Timecounter "i8254" frequency 1193182 Hz
Calibrating TSC clock ... TSC clock: 1788943592 Hz
Timecounter "TSC" frequency 1788943592 Hz
CPU: Mobile AMD Athlon(tm) XP 2200+ (1788.94-MHz 686-class CPU)
Origin = "AuthenticAMD" Id = 0x681 Stepping = 1
Features=0x383f9ff<FPU,VME,DE,PSE,TSC,MSR,PAE,MCE,CX8,SEP,MTRR,PGE,MCA,CMOV,PAT,PSE36,MMX,FXSR,SSE>
AMD Features=0xc0480000<MP,AMIE,DSP,3DNow!>
Data TLB: 32 entries, fully associative
Instruction TLB: 16 entries, fully associative
L1 data cache: 64 kbytes, 64 bytes/line, 1 lines/tag, 2-way associative
L1 instruction cache: 64 kbytes, 64 bytes/line, 1 lines/tag, 2-way associative
L2 internal cache: 256 kbytes, 64 bytes/line, 1 lines/tag, 8-way associative
real memory = 251658240 (240 MB)
Physical memory chunk(s):
0x0000000000001000 - 0x000000000009dfff, 643072 bytes (157 pages)
0x00000000006fb000 - 0x000000000ea99fff, 238678016 bytes (58271 pages)
0x000000000ef00000 - 0x000000000eff7fff, 1015808 bytes (248 pages)
avail memory = 236990464 (226 MB)
bios32: Found BIOS32 Service Directory header at 0xc00f6ff0
bios32: Entry = 0xfd760 (c00fd760) Rev = 0 Len = 1
pcibios: PCI BIOS entry at 0xfd760+0x11e
pnpbios: Found PnP BIOS data at 0xc00f7050
pnpbios: Entry = f0000:9c77 Rev = 1.0
Other BIOS signatures found:
wlan: <802.11 Link Layer>
null: <null device, zero device>
random: <entropy source>
mem: <memory & I/O>
Pentium Pro MTRR support enabled
npx0: <math processor> on motherboard
npx0: INT 16 interface
acpi0: <PTLTD RSDT > on motherboard
pci_open(1): mode 1 addr port (0x0cf8) is 0x80008004
pci_open(1a): mode1res=0x80000000 (0x80000000)
pci_cfgcheck: device 0 [class=060000] [hdr=00] is there (id=cab01002)
pcibios: BIOS version 2.10
Using $PIR table, 11 entries at 0xc00fdf10
PCI-Only Interrupts: none
Location Bus Device Pin Link IRQs
embedded 0 2 A 0x59 11
embedded 0 15 A 0x4a 11
embedded 0 8 A 0x4b 5
embedded 0 10 A 0x48 10 11
embedded 0 11 A 0x49 10 11
embedded 0 19 A 0x49 10 11
embedded 0 12 A 0x49 10 11
embedded 0 12 B 0x49 10 11
slot 13 1 5 A 0x49 10 11
AcpiOsDerivePciId: bus 0 dev 7 func 0
AcpiOsDerivePciId: bus 0 dev 7 func 0
AcpiOsDerivePciId: bus 0 dev 10 func 0
acpi0: power button is handled as a fixed feature programming model.
acpi0: sleep button is handled as a fixed feature programming model.
ACPI timer looks GOOD min = 1, max = 2, width = 1
ACPI timer looks GOOD min = 2, max = 2, width = 0
ACPI timer looks GOOD min = 1, max = 2, width = 1
ACPI timer looks GOOD min = 1, max = 2, width = 1
ACPI timer looks GOOD min = 1, max = 2, width = 1
ACPI timer looks GOOD min = 1, max = 2, width = 1
ACPI timer looks GOOD min = 1, max = 2, width = 1
ACPI timer looks GOOD min = 1, max = 2, width = 1
ACPI timer looks GOOD min = 1, max = 2, width = 1
ACPI timer looks GOOD min = 1, max = 2, width = 1
Timecounter "ACPI-fast" frequency 3579545 Hz
AcpiOsDerivePciId: bus 0 dev 0 func 0
acpi_timer0: <32-bit timer at 3.579545MHz> port 0x8008-0x800b on acpi0
acpi_cpu0: <CPU> on acpi0
acpi_tz0: <thermal zone> on acpi0
acpi_button0: <Sleep Button> on acpi0
acpi_button1: <Power Button> on acpi0
acpi_lid0: <Control Method Lid Switch> on acpi0
pcib0: <ACPI Host-PCI bridge> port 0xcf8-0xcff on acpi0
---- initial configuration ------------------------
\\_SB_.PCI0.ISA_.LNK8 irq 11: [ 3 4 5 6 7 10 11 12] low,level,sharable 0.2.0
\\_SB_.PCI0.ISA_.LNK4 irq 11: [ 3 4 5 6 7 10 11 12] low,level,sharable 0.15.0
\\_SB_.PCI0.ISA_.LNK7 irq 5: [ 3 4 5 6 7 10 11 12] low,level,sharable 0.8.0
\\_SB_.PCI0.ISA_.LNK1 irq 0: [ 3 4 5 6 7 10 11 12] low,level,sharable 0.10.0
\\_SB_.PCI0.ISA_.LNK3 irq 11: [ 3 4 5 6 7 10 11 12] low,level,sharable 0.11.0
\\_SB_.PCI0.ISA_.LNK2 irq 10: [ 3 4 5 6 7 10 11 12] low,level,sharable 0.19.0
\\_SB_.PCI0.ISA_.LNK2 irq 10: [ 3 4 5 6 7 10 11 12] low,level,sharable 0.12.0
\\_SB_.PCI0.ISA_.LNK3 irq 11: [ 3 4 5 6 7 10 11 12] low,level,sharable 0.12.1
---- before setting priority for links ------------
\\_SB_.PCI0.ISA_.LNK1:
interrupts: 3 4 5 6 7 10 11 12
penalty: 1110 1110 210 1110 1110 310 510 1110
references: 1
priority: 0
---- before fixup boot-disabled links -------------
\\_SB_.PCI0.ISA_.LNK1:
interrupts: 3 4 5 6 7 10 11 12
penalty: 1110 1110 210 1110 1110 310 510 1110
references: 1
priority: 822
---- after fixup boot-disabled links --------------
---- arbitrated configuration ---------------------
\\_SB_.PCI0.ISA_.LNK8 irq 11: [ 3 4 5 6 7 10 11 12] low,level,sharable 0.2.0
\\_SB_.PCI0.ISA_.LNK4 irq 11: [ 3 4 5 6 7 10 11 12] low,level,sharable 0.15.0
\\_SB_.PCI0.ISA_.LNK7 irq 5: [ 3 4 5 6 7 10 11 12] low,level,sharable 0.8.0
\\_SB_.PCI0.ISA_.LNK1 irq 5: [ 3 4 5 6 7 10 11 12] low,level,sharable 0.10.0
\\_SB_.PCI0.ISA_.LNK3 irq 11: [ 3 4 5 6 7 10 11 12] low,level,sharable 0.11.0
\\_SB_.PCI0.ISA_.LNK2 irq 10: [ 3 4 5 6 7 10 11 12] low,level,sharable 0.19.0
\\_SB_.PCI0.ISA_.LNK2 irq 10: [ 3 4 5 6 7 10 11 12] low,level,sharable 0.12.0
\\_SB_.PCI0.ISA_.LNK3 irq 11: [ 3 4 5 6 7 10 11 12] low,level,sharable 0.12.1
pci0: <ACPI PCI bus> on pcib0
pci0: physical bus=0
map[10]: type 3, range 32, base f8000000, size 26, enabled
map[14]: type 3, range 32, base f4400000, size 12, enabled
map[18]: type 4, range 32, base 00008090, size 2, port disabled
found-> vendor=0x1002, dev=0xcab0, revid=0x13
bus=0, slot=0, func=0
class=06-00-00, hdrtype=0x00, mfdev=0
cmdreg=0x0006, statreg=0x2230, cachelnsz=0 (dwords)
lattimer=0x40 (1920 ns), mingnt=0x00 (0 ns), maxlat=0x00 (0 ns)
found-> vendor=0x1002, dev=0x700f, revid=0x01
bus=0, slot=1, func=0
class=06-04-00, hdrtype=0x01, mfdev=0
cmdreg=0x0007, statreg=0x0220, cachelnsz=0 (dwords)
lattimer=0x63 (2970 ns), mingnt=0x0c (3000 ns), maxlat=0x00 (0 ns)
map[10]: type 1, range 32, base f4010000, size 12, enabled
found-> vendor=0x10b9, dev=0x5237, revid=0x03
bus=0, slot=2, func=0
class=0c-03-10, hdrtype=0x00, mfdev=0
cmdreg=0x0017, statreg=0x0290, cachelnsz=0 (dwords)
lattimer=0x40 (1920 ns), mingnt=0x00 (0 ns), maxlat=0x50 (20000 ns)
intpin=a, irq=11
powerspec 2 supports D0 D3 current D0
found-> vendor=0x10b9, dev=0x1533, revid=0x00
bus=0, slot=7, func=0
class=06-01-00, hdrtype=0x00, mfdev=0
cmdreg=0x000f, statreg=0x0210, cachelnsz=0 (dwords)
lattimer=0x00 (0 ns), mingnt=0x00 (0 ns), maxlat=0x00 (0 ns)
powerspec 1 supports D0 D3 current D0
map[10]: type 4, range 32, base 00008400, size 8, enabled
map[14]: type 1, range 32, base f4011000, size 12, enabled
found-> vendor=0x10b9, dev=0x5451, revid=0x02
bus=0, slot=8, func=0
class=04-01-00, hdrtype=0x00, mfdev=0
cmdreg=0x0003, statreg=0xc290, cachelnsz=0 (dwords)
lattimer=0x40 (1920 ns), mingnt=0x02 (500 ns), maxlat=0x18 (6000 ns)
intpin=a, irq=5
powerspec 2 supports D0 D1 D2 D3 current D0
map[10]: type 1, range 32, base ffbfe000, size 12, enabled
found-> vendor=0x104c, dev=0xac50, revid=0x02
bus=0, slot=10, func=0
class=06-07-00, hdrtype=0x02, mfdev=0
cmdreg=0x0007, statreg=0x0210, cachelnsz=0 (dwords)
lattimer=0x20 (960 ns), mingnt=0xc0 (48000 ns), maxlat=0x03 (750 ns)
intpin=a, irq=255
powerspec 1 supports D0 D1 D2 D3 current D0
map[10]: type 4, range 32, base 00008800, size 8, enabled
map[14]: type 1, range 32, base f4013000, size 8, enabled
found-> vendor=0x10ec, dev=0x8139, revid=0x20
bus=0, slot=11, func=0
class=02-00-00, hdrtype=0x00, mfdev=0
cmdreg=0x0013, statreg=0x0290, cachelnsz=16 (dwords)
lattimer=0x40 (1920 ns), mingnt=0x20 (8000 ns), maxlat=0x40 (16000 ns)
intpin=a, irq=11
powerspec 2 supports D0 D1 D2 D3 current D0
map[10]: type 1, range 32, base f4000000, size 16, enabled
map[14]: type 4, range 32, base 00008098, size 3, enabled
found-> vendor=0x14f1, dev=0x2f00, revid=0x01
bus=0, slot=12, func=0
class=07-80-00, hdrtype=0x00, mfdev=0
cmdreg=0x0003, statreg=0x0290, cachelnsz=0 (dwords)
lattimer=0x40 (1920 ns), mingnt=0x00 (0 ns), maxlat=0x00 (0 ns)
intpin=a, irq=10
powerspec 2 supports D0 D3 current D0
map[10]: type 1, range 32, base f4012000, size 12, enabled
found-> vendor=0x10b9, dev=0x5237, revid=0x03
bus=0, slot=15, func=0
class=0c-03-10, hdrtype=0x00, mfdev=0
cmdreg=0x0013, statreg=0x0290, cachelnsz=0 (dwords)
lattimer=0x40 (1920 ns), mingnt=0x00 (0 ns), maxlat=0x50 (20000 ns)
intpin=a, irq=11
powerspec 2 supports D0 D3 current D0
map[20]: type 4, range 32, base 00008080, size 4, enabled
found-> vendor=0x10b9, dev=0x5229, revid=0xc4
bus=0, slot=16, func=0
class=01-01-fa, hdrtype=0x00, mfdev=0
cmdreg=0x0005, statreg=0x0290, cachelnsz=0 (dwords)
lattimer=0x20 (960 ns), mingnt=0x02 (500 ns), maxlat=0x04 (1000 ns)
intpin=a, irq=255
powerspec 2 supports D0 D3 current D0
found-> vendor=0x10b9, dev=0x7101, revid=0x00
bus=0, slot=17, func=0
class=06-80-00, hdrtype=0x00, mfdev=0
cmdreg=0x0000, statreg=0x0200, cachelnsz=0 (dwords)
lattimer=0x00 (0 ns), mingnt=0x00 (0 ns), maxlat=0x00 (0 ns)
pcib1: <ACPI PCI-PCI bridge> at device 1.0 on pci0
pcib1: secondary bus 1
pcib1: subordinate bus 1
pcib1: I/O decode 0x9000-0x9fff
pcib1: memory decode 0xf4100000-0xf41fffff
pcib1: prefetched decode 0xf6000000-0xf7ffffff
---- initial configuration ------------------------
\\_SB_.PCI0.ISA_.LNK2 irq 10: [ 3 4 5 6 7 10 11 12] low,level,sharable 1.5.0
---- before setting priority for links ------------
---- before fixup boot-disabled links -------------
---- after fixup boot-disabled links --------------
---- arbitrated configuration ---------------------
\\_SB_.PCI0.ISA_.LNK2 irq 10: [ 3 4 5 6 7 10 11 12] low,level,sharable 1.5.0
pci1: <ACPI PCI bus> on pcib1
pci1: physical bus=1
map[10]: type 3, range 32, base f6000000, size 25, enabled
map[14]: type 4, range 32, base 00009000, size 8, enabled
map[18]: type 1, range 32, base f4100000, size 16, enabled
found-> vendor=0x1002, dev=0x4336, revid=0x00
bus=1, slot=5, func=0
class=03-00-00, hdrtype=0x00, mfdev=0
cmdreg=0x0287, statreg=0x02b0, cachelnsz=16 (dwords)
lattimer=0x42 (1980 ns), mingnt=0x08 (2000 ns), maxlat=0x00 (0 ns)
intpin=a, irq=10
powerspec 2 supports D0 D1 D2 D3 current D0
pci1: <display, VGA> at device 5.0 (no driver attached)
ohci0: <AcerLabs M5237 (Aladdin-V) USB controller> mem 0xf4010000-0xf4010fff irq 11 at device 2.0 on pci0
usb0: OHCI version 1.0, legacy support
usb0: <AcerLabs M5237 (Aladdin-V) USB controller> on ohci0
usb0: USB revision 1.0
uhub0: AcerLabs OHCI root hub, class 9/0, rev 1.00/1.00, addr 1
uhub0: 2 ports with 2 removable, self powered
isab0: <PCI-ISA bridge> at device 7.0 on pci0
isa0: <ISA bus> on isab0
pci0: <multimedia, audio> at device 8.0 (no driver attached)
cbb0: <TI1410 PCI-CardBus Bridge> mem 0xffbfe000-0xffbfefff at device 10.0 on pci0
cardbus0: <CardBus bus> on cbb0
pccard0: <16-bit PCCard bus> on cbb0
pcib0: matched entry for 0.10.INTA (source \\_SB_.PCI0.ISA_.LNK1)
pcib0: slot 10 INTA is routed to irq 5
rl0: <RealTek 8139 10/100BaseTX> port 0x8800-0x88ff mem 0xf4013000-0xf40130ff irq 11 at device 11.0 on pci0
rl0: Realtek 8139B detected. Warning, this may be unstable in autoselect mode
rl0: Ethernet address: 00:0b:cd:84:32:7a
miibus0: <MII bus> on rl0
rlphy0: <RealTek internal media interface> on miibus0
rlphy0: 10baseT, 10baseT-FDX, 100baseTX, 100baseTX-FDX, auto
rl0: bpf attached
pci0: <simple comms> at device 12.0 (no driver attached)
ohci1: <AcerLabs M5237 (Aladdin-V) USB controller> mem 0xf4012000-0xf4012fff irq 11 at device 15.0 on pci0
usb1: OHCI version 1.0, legacy support
usb1: <AcerLabs M5237 (Aladdin-V) USB controller> on ohci1
usb1: USB revision 1.0
uhub1: AcerLabs OHCI root hub, class 9/0, rev 1.00/1.00, addr 1
uhub1: 4 ports with 4 removable, self powered
atapci0: <AcerLabs Aladdin UDMA100 controller> port 0x8080-0x808f at device 16.0 on pci0
ata0: pre reset mask=03 ostat0=50 ostat2=00
ata0-master: ATAPI 00 00
ata0-slave: ATAPI 00 00
ata0: after reset mask=03 stat0=50 stat1=00
ata0-master: ATA 01 a5
ata0: devices=01
ata0: at 0x1f0 irq 14 on atapci0
ata1: pre reset mask=03 ostat0=50 ostat2=01
ata1-master: ATAPI 14 eb
ata1-slave: ATAPI 00 00
ata1: after reset mask=03 stat0=00 stat1=01
ata1-slave: ATA 04 00
ata1: devices=04
ata1: at 0x170 irq 15 on atapci0
pci0: <bridge, PCI-unknown> at device 17.0 (no driver attached)
acpi_acad0: <AC adapter> on acpi0
acpi_cmbat0: <Control method Battery> on acpi0
atkbdc0: <Keyboard controller (i8042)> port 0x64,0x60 irq 1 on acpi0
atkbd0: <AT Keyboard> flags 0x1 irq 1 on atkbdc0
atkbd: the current kbd controller command byte 0067
atkbd: keyboard ID 0x41ab (2)
kbd0 at atkbd0
kbd0: atkbd0, AT 101/102 (2), config:0x1, flags:0x3d0000
psm0: unable to allocate IRQ
acpi_ec0: <embedded controller> port 0x66,0x62 on acpi0
unknown: not probed (disabled)
unknown: not probed (disabled)
ppc0: using extended I/O port range
ppc0: ECP SPP ECP+EPP SPP
ppc0 port 0x778-0x77f,0x378-0x37f irq 7 drq 1 on acpi0
ppc0: SMC-like chipset (ECP/EPP/PS2/NIBBLE) in COMPATIBLE mode
ppc0: FIFO with 16/16/15 bytes threshold
ppbus0: <Parallel port bus> on ppc0
plip0: <PLIP network interface> on ppbus0
lp0: bpf attached
lpt0: <Printer> on ppbus0
lpt0: Interrupt-driven port
ppi0: <Parallel I/O> on ppbus0
unknown: not probed (disabled)
unknown: not probed (disabled)
unknown: not probed (disabled)
unknown: not probed (disabled)
unknown: not probed (disabled)
fdc0: <Enhanced floppy controller (i82077, NE72065 or clone)> port 0x3f7,0x3f0-0x3f5 irq 6 drq 2 on acpi0
fdc0: FIFO enabled, 8 bytes threshold
fd0: <1440-KB 3.5" drive> on fdc0 drive 0
unknown: not probed (disabled)
unknown: not probed (disabled)
unknown: not probed (disabled)
unknown: not probed (disabled)
unknown: not probed (disabled)
unknown: not probed (disabled)
unknown: not probed (disabled)
ata: ata0 already exists; skipping it
ata: ata1 already exists; skipping it
atkbdc: atkbdc0 already exists; skipping it
fdc: fdc0 already exists; skipping it
ppc: ppc0 already exists; skipping it
Trying Read_Port at 203
Trying Read_Port at 243
Trying Read_Port at 283
Trying Read_Port at 2c3
Trying Read_Port at 303
Trying Read_Port at 343
Trying Read_Port at 383
Trying Read_Port at 3c3
ex_isa_identify()
sc: sc0 already exists; skipping it
vga: vga0 already exists; skipping it
isa_probe_children: disabling PnP devices
isa_probe_children: probing non-PnP devices
orm0: <Option ROMs> at iomem 0xe0000-0xe3fff,0xdf000-0xdffff,0xc0000-0xcefff on isa0
pmtimer0 on isa0
adv0: not probed (disabled)
aha0: not probed (disabled)
aic0: not probed (disabled)
bt0: not probed (disabled)
cs0: not probed (disabled)
ed0: not probed (disabled)
fe0: not probed (disabled)
ie0: not probed (disabled)
le0: not probed (disabled)
lnc0: not probed (disabled)
pcic0 failed to probe at port 0x3e0 iomem 0xd0000 on isa0
pcic1: not probed (disabled)
sc0: <System console> at flags 0x100 on isa0
sc0: VGA <16 virtual consoles, flags=0x300>
sc0: fb0, kbd0, terminal emulator: sc (syscons terminal)
sio0: configured irq 4 not in bitmap of probed irqs 0
sio0: port may not be enabled
sio0: irq maps: 0x1 0x1 0x1 0x1
sio0: probe failed test(s): 0 1 2 4 6 7 9
sio0 at port 0x3f8-0x3ff irq 4 flags 0x10 on isa0
sio0: type 8250 or not responding
sio1: configured irq 3 not in bitmap of probed irqs 0
sio1: port may not be enabled
sio1: irq maps: 0x1 0x1 0x1 0x1
sio1: probe failed test(s): 0 1 2 4 6 7 9
sio1 failed to probe at port 0x2f8-0x2ff irq 3 on isa0
sio2: not probed (disabled)
sio3: not probed (disabled)
sn0: not probed (disabled)
vga0: <Generic ISA VGA> at port 0x3c0-0x3df iomem 0xa0000-0xbffff on isa0
fb0: vga0, vga, type:VGA (5), flags:0x7007f
fb0: port:0x3c0-0x3df, crtc:0x3d4, mem:0xa0000 0x20000
fb0: init mode:24, bios mode:3, current mode:24
fb0: window:0xc00b8000 size:32k gran:32k, buf:0 size:32k
vga0: vga: WARNING: video mode switching is not fully supported on this adapter
VGA parameters upon power-up
50 18 10 00 00 00 03 00 02 e7 73 4f 4f 97 52 83
b4 1f 00 4f 0d 0e 00 00 07 80 92 88 8f 28 1f 8f
b5 a3 ff 00 01 02 03 04 05 14 07 38 39 3a 3b 3c
3d 3e 3f 0c 00 0f 08 00 00 00 00 00 10 0e 00 ff
VGA parameters in BIOS for mode 24
50 18 10 00 10 00 03 00 02 67 5f 4f 50 82 55 81
bf 1f 00 4f 0d 0e 00 00 00 00 9c 8e 8f 28 1f 96
b9 a3 ff 00 01 02 03 04 05 14 07 38 39 3a 3b 3c
3d 3e 3f 0c 00 0f 08 00 00 00 00 00 10 0e 00 ff
EGA/VGA parameters to be used for mode 24
50 18 10 00 00 00 03 00 02 e7 73 4f 4f 97 52 83
b4 1f 00 4f 0d 0e 00 00 07 80 92 88 8f 28 1f 8f
b5 a3 ff 00 01 02 03 04 05 14 07 38 39 3a 3b 3c
3d 3e 3f 0c 00 0f 08 00 00 00 00 00 10 0e 00 ff
vt0: not probed (disabled)
isa_probe_children: probing PnP devices
Device configuration finished.
procfs registered
Timecounters tick every 10.000 msec
lo0: bpf attached
acpi_cpu0: set speed to 100.0%
acpi_cpu: throttling enabled, 8 steps (100% to 12.5%), currently 100.0%
acpi_acad0: acline initialization start
acpi_acad0: On Line
acpi_acad0: acline initialization done, tried 1 times
acpi_cmbat0: battery initialization start
acpi_acad0: Notify 0
ad0: success setting UDMA100 on AcerLabs Aladdin chip
ad0: <IC25N040ATCS04-0/CA4OA71A> ATA-5 disk at ata0-master
ad0: 38154MB (78140160 sectors), 77520 C, 16 H, 63 S, 512 B
ad0: 16 secs/int, 1 depth queue, UDMA100
ad0: piomode=12 dmamode=34 udmamode=69 cblid=1
GEOM: new disk ad0
acpi_cmbat0: battery initialization done, tried 1 times
ar: FreeBSD check1 failed
ata1-master: piomode=12 dmamode=34 udmamode=-1 dmaflag=1
ata1-master: success setting PIO4 on AcerLabs Aladdin chip
acd0: <HL-DT-STCD-RW/DVD DRIVE GCC-4240N/0111> CD-RW drive at ata1 as master
acd0: read 4134KB/s (34515KB/s) write 4134KB/s (4134KB/s), 2048KB buffer, PIO4
acd0: Reads: CD-R, CD-RW, CD-DA stream, DVD-ROM, DVD-R, DVD-RAM, packet
acd0: Writes: CD-R, CD-RW, test write, burnproof
acd0: Audio: play, 256 volume levels
acd0: Mechanism: ejectable tray, unlocked
acd0: Medium: CD-ROM 120mm data disc
[0] f:00 typ:7 s(CHS):0/1/1 e(CHS):1023/254/63 s:63 l:38909367
[1] f:80 typ:165 s(CHS):1023/255/63 e(CHS):1023/254/63 s:38909430 l:39230730
[2] f:00 typ:0 s(CHS):0/0/0 e(CHS):0/0/0 s:0 l:0
[3] f:00 typ:0 s(CHS):0/0/0 e(CHS):0/0/0 s:0 l:0
GEOM: Configure ad0s1, start 32256 length 19921595904 end 19921628159
GEOM: Configure ad0s2, start 19921628160 length 20086133760 end 40007761919
GEOM: Configure ad0s2a, start 536870912 length 19549262848 end 20086133759
GEOM: Configure ad0s2b, start 0 length 536870912 end 536870911
GEOM: Configure ad0s2c, start 0 length 20086133760 end 20086133759
Mounting root from ufs:/dev/ad0s2a
start_init: trying /sbin/init
acpidump output:
/*
RSD PTR: Checksum=35, OEMID=PTLTD, RsdtAddress=0x0eefad6c
*/
/*
RSDT: Length=44, Revision=1, Checksum=39,
OEMID=PTLTD, OEM Table ID= RSDT, OEM Revision=0x6040000,
Creator ID= LTP, Creator Revision=0x0
*/
/*
Entries={ 0x0eefee53, 0x0eefeec7 }
*/
/*
DSDT=0xeefad98
INT_MODEL=PIC
SCI_INT=9
SMI_CMD=0xb1, ACPI_ENABLE=0xf0, ACPI_DISABLE=0xf1, S4BIOS_REQ=0xf2
PM1a_EVT_BLK=0x8000-0x8003
PM1a_CNT_BLK=0x8004-0x8005
PM2_CNT_BLK=0x8090-0x8090
PM2_TMR_BLK=0x8008-0x800b
PM2_GPE0_BLK=0x8018-0x8027
P_LVL2_LAT=2000ms, P_LVL3_LAT=2000ms
FLUSH_SIZE=0, FLUSH_STRIDE=0
DUTY_OFFSET=1, DUTY_WIDTH=3
DAY_ALRM=0, MON_ALRM=0, CENTURY=50
Flags={WBINVD,TMR_VAL_EXT}
*/
/*
DSDT: Length=16571, Revision=1, Checksum=187,
OEMID=COMPAQ, OEM Table ID=BOONE, OEM Revision=0x6040000,
Creator ID=MSFT, Creator Revision=0x100000d
*/
DefinitionBlock (
"acpi_dsdt.aml", //Output filename
"DSDT", //Signature
0x1, //DSDT Revision
"COMPAQ", //OEMID
"BOONE", //TABLE ID
0x6040000 //OEM Revision
)
{
Scope(_PR_) {
Processor(CPU0, 0, 0x8010, 0x6) {
}
}
Name(_S0_, Package(0x4) {
0x0,
0x0,
0x0,
0x0,
})
Name(_S3_, Package(0x4) {
0x3,
0x3,
0x0,
0x0,
})
Name(_S4_, Package(0x4) {
0x4,
0x4,
0x0,
0x0,
})
Name(_S5_, Package(0x4) {
0x5,
0x5,
0x0,
0x0,
})
Method(_PTS, 1) {
If(LEqual(Arg0, 0x5)) {
Store(0x95, \_SB_.PCI0.ISA_.BCMD)
Store(Zero, \_SB_.PCI0.ISA_.SMIC)
Sleep(0x07d0)
}
If(LEqual(Arg0, 0x4)) {
Store(0x96, \_SB_.PCI0.ISA_.BCMD)
Store(Zero, \_SB_.PCI0.ISA_.SMIC)
Sleep(0x07d0)
}
If(LEqual(Arg0, 0x3)) {
Store(0x81, \_SB_.PCI0.ISA_.BCMD)
Store(Zero, \_SB_.PCI0.ISA_.SMIC)
Store(0x1, \_SB_.PCI0.CRD0.PMST)
Sleep(0x07d0)
}
}
Method(_WAK, 1) {
If(LEqual(Arg0, 0x5)) {
Store(0x1, \_SB_.PCI0.ISA_.EC__.ACPI)
}
If(LEqual(Arg0, 0x4)) {
Store(0x1, \_SB_.PCI0.ISA_.EC__.ACPI)
Notify(\_SB_.PWRB, 0x2)
}
If(LEqual(Arg0, 0x3)) {
Store(0x82, \_SB_.PCI0.ISA_.BCMD)
Store(Zero, \_SB_.PCI0.ISA_.SMIC)
If(LEqual(\_GPE.GPEF, 0x1)) {
Notify(\_SB_.PWRB, 0x2)
}
}
Store(0x0, \_GPE.GPEF)
}
Scope(_SI_) {
Method(_SST, 1) {
If(LEqual(Arg0, 0x1)) {
Store("===== SST Working =====", Debug)
}
If(LEqual(Arg0, 0x2)) {
Store("===== SST Waking =====", Debug)
}
If(LEqual(Arg0, 0x3)) {
Store("===== SST Sleeping =====", Debug)
}
If(LEqual(Arg0, 0x4)) {
Store("===== SST Sleeping S4 =====", Debug)
}
}
}
Scope(_SB_) {
Device(SLPB) {
Name(_HID, 0x0e0cd041)
Name(_PRW, Package(0x2) {
0x1,
0x3,
})
}
Device(PWRB) {
Name(_HID, 0x0c0cd041)
Name(_PRW, Package(0x2) {
0x1,
0x4,
})
}
Device(LID_) {
Name(_HID, 0x0d0cd041)
Name(_PRW, Package(0x2) {
0x1,
0x3,
})
Method(_LID) {
If(\_SB_.PCI0.ISA_.EC__.ECOK) {
If(\_SB_.PCI0.ISA_.EC__.LIDS) {
Return(0x0)
}
Else {
Return(0x1)
}
}
Else {
Return(0x0)
}
}
}
Scope(\_GPE) {
Method(_L01) {
Store(0x1, GPEF)
If(Not(\_SB_.PCI0.ISA_.EC__.Z000, )) {
Notify(\_SB_.PCI0.ISA_.KBC0, 0x80)
}
If(Not(\_SB_.PCI0.ISA_.EC__.TME0, )) {
Notify(\_SB_.PCI0.ISA_.MSE0, 0x80)
}
}
Method(_L09) {
Store(0x1, GPEF)
Notify(\_SB_.PCI0, 0x2)
}
}
Device(PCI0) {
Name(_HID, 0x030ad041)
Name(_ADR, 0x0)
Name(_BBN, 0x0)
OperationRegion(MREG, PCI_Config, 0xb8, 0x14)
Field(MREG, ByteAcc, NoLock, Preserve) {
CS0_, 8,
CS1_, 8,
CS2_, 8,
CS3_, 8,
Offset(0x10),
FBSL, 8,
FBSM, 8
}
Method(TOM_) {
Multiply(FBSL, 0x00010000, Local0)
Multiply(FBSM, 0x01000000, Local1)
Add(Local0, Local1, Local0)
Return(Local0)
}
OperationRegion(VGAM, SystemMemory, 0x000c0002, 0x1)
Field(VGAM, ByteAcc, Lock, Preserve) {
VSIZ, 8
}
Name(RSRC, Buffer(0x73) {0x88, 0xe, 0x0, 0x2, 0xe, 0x0, 0x0, 0x0, 0x0, 0x0, 0xff, 0x0, 0x0, 0x0, 0x0, 0x1, 0x0, 0x87, 0x18, 0x0, 0x0, 0xe, 0x1, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0xa, 0x0, 0xff, 0xff, 0xb, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x2, 0x0, 0x0, 0x87, 0x18, 0x0, 0x0, 0xe, 0x1, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x10, 0x0, 0xff, 0xff, 0xfd, 0xff, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0xee, 0xff, 0x0, 0x47, 0x1, 0xf8, 0xc, 0xf8, 0xc, 0x1, 0x8, 0x88, 0xe, 0x0, 0x1, 0xc, 0x3, 0x0, 0x0, 0x0, 0x0, 0xf7, 0xc, 0x0, 0x0, 0xf8, 0xc, 0x0, 0x88, 0xe, 0x0, 0x1, 0xc, 0x3, 0x0, 0x0, 0x0, 0xd, 0xff, 0xff, 0x0, 0x0, 0x0, 0xf3, 0x0, 0x79, 0x0 })
Method(_CRS, 0, Serialized) {
CreateDWordField(RSRC, 0x1f, VMAX)
CreateDWordField(RSRC, 0x27, VLEN)
ShiftLeft(VSIZ, 0x9, Local0)
Add(Local0, 0x000bffff, VMAX)
Add(Local0, 0x00020000, VLEN)
CreateDWordField(RSRC, 0x36, BTMN)
CreateDWordField(RSRC, 0x3a, BTMX)
CreateDWordField(RSRC, 0x42, BTLN)
Store(\_SB_.PCI0.TOM_(), BTMN)
Subtract(0xfff80000, BTMN, BTLN)
Subtract(Add(BTMN, BTLN, ), 0x1, BTMX)
Return(RSRC)
}
OperationRegion(ECSM, SystemMemory, 0x0eeffd4d, 0x00000200)
Field(ECSM, AnyAcc, NoLock, Preserve) {
ADP_, 1,
, 1,
BATP, 1,
, 1,
BATL, 1,
BATC, 1,
Offset(0x1),
BDC_, 32,
BFC_, 32,
BTC_, 32,
BDV_, 32,
BST_, 32,
BPR_, 32,
BRC_, 32,
BPV_, 32,
BCW_, 32,
BCL_, 32,
BCG_, 32,
BG2_, 32,
BMO_, 32,
BSN0, 32,
BSN1, 32,
BTY0, 8,
BTY1, 8,
BTY2, 8,
BTY3, 8,
NABT, 8,
TMP_, 16,
ECOK, 8
}
Method(_STA) {
Return(0xf)
}
Name(_PRT, Package(0x8) {
Package(0x4) {
0x0002ffff,
0x0,
\_SB_.PCI0.ISA_.LNK8,
0x0,
},
Package(0x4) {
0x000fffff,
0x0,
\_SB_.PCI0.ISA_.LNK4,
0x0,
},
Package(0x4) {
0x0008ffff,
0x0,
\_SB_.PCI0.ISA_.LNK7,
0x0,
},
Package(0x4) {
0x000affff,
0x0,
\_SB_.PCI0.ISA_.LNK1,
0x0,
},
Package(0x4) {
0x000bffff,
0x0,
\_SB_.PCI0.ISA_.LNK3,
0x0,
},
Package(0x4) {
0x0013ffff,
0x0,
\_SB_.PCI0.ISA_.LNK2,
0x0,
},
Package(0x4) {
0x000cffff,
0x0,
\_SB_.PCI0.ISA_.LNK2,
0x0,
},
Package(0x4) {
0x000cffff,
0x1,
\_SB_.PCI0.ISA_.LNK3,
0x0,
},
})
Device(ISA_) {
Name(_ADR, 0x00070000)
Mutex(PSMX, 0)
OperationRegion(PUSB, PCI_Config, 0x74, 0x1)
Field(PUSB, ByteAcc, NoLock, Preserve) {
PIR8, 4,
Offset(0x1)
}
OperationRegion(PIRX, PCI_Config, 0x48, 0x4)
Field(PIRX, ByteAcc, NoLock, Preserve) {
PIR0, 4,
PIR1, 4,
PIR2, 4,
PIR3, 4,
PIR4, 4,
PIR5, 4,
PIR6, 4,
PIR7, 4
}
Name(IPRS, Buffer(0x6) {0x23, 0xf8, 0x1c, 0x18, 0x79, 0x0 })
Name(IXLT, Package(0x10) {
0x0,
0x0200,
0x8,
0x0400,
0x10,
0x20,
0x80,
0x40,
0x2,
0x0800,
0x0,
0x1000,
0x0,
0x4000,
0x0,
0x8000,
})
Device(LNK0) {
Name(_HID, 0x0f0cd041)
Name(_UID, 0x1)
Method(_STA) {
If(PIR0) {
Return(0xb)
}
Else {
Return(0x9)
}
}
Method(_PRS) {
Return(IPRS)
}
Method(_DIS) {
Store(0x0, PIR0)
}
Method(_CRS) {
Store(IPRS, Local0)
CreateWordField(Local0, 0x1, IRA0)
Store(PIR0, Local1)
Store(DerefOf(Index(IXLT, Local1, )), IRA0)
Return(Local0)
}
Method(_SRS, 1) {
CreateWordField(Arg0, 0x1, IRA0)
Store(Match(IXLT, MEQ, IRA0, MGT, 0x0, 0x0), PIR0)
}
}
Device(LNK1) {
Name(_HID, 0x0f0cd041)
Name(_UID, 0x2)
Method(_STA) {
If(PIR1) {
Return(0xb)
}
Else {
Return(0x9)
}
}
Method(_PRS) {
Return(IPRS)
}
Method(_DIS) {
Store(0x0, PIR1)
}
Method(_CRS) {
Store(IPRS, Local0)
CreateWordField(Local0, 0x1, IRA0)
Store(PIR1, Local1)
Store(DerefOf(Index(IXLT, Local1, )), IRA0)
Return(Local0)
}
Method(_SRS, 1) {
CreateWordField(Arg0, 0x1, IRA0)
Store(Match(IXLT, MEQ, IRA0, MGT, 0x0, 0x0), PIR1)
}
}
Device(LNK2) {
Name(_HID, 0x0f0cd041)
Name(_UID, 0x3)
Method(_STA) {
If(PIR2) {
Return(0xb)
}
Else {
Return(0x9)
}
}
Method(_PRS) {
Return(IPRS)
}
Method(_DIS) {
Store(0x0, PIR2)
}
Method(_CRS) {
Store(IPRS, Local0)
CreateWordField(Local0, 0x1, IRA0)
Store(PIR2, Local1)
Store(DerefOf(Index(IXLT, Local1, )), IRA0)
Return(Local0)
}
Method(_SRS, 1) {
CreateWordField(Arg0, 0x1, IRA0)
Store(Match(IXLT, MEQ, IRA0, MGT, 0x0, 0x0), PIR2)
}
}
Device(LNK3) {
Name(_HID, 0x0f0cd041)
Name(_UID, 0x4)
Method(_STA) {
If(PIR3) {
Return(0xb)
}
Else {
Return(0x9)
}
}
Method(_PRS) {
Return(IPRS)
}
Method(_DIS) {
Store(0x0, PIR3)
}
Method(_CRS) {
Store(IPRS, Local0)
CreateWordField(Local0, 0x1, IRA0)
Store(PIR3, Local1)
Store(DerefOf(Index(IXLT, Local1, )), IRA0)
Return(Local0)
}
Method(_SRS, 1) {
CreateWordField(Arg0, 0x1, IRA0)
Store(Match(IXLT, MEQ, IRA0, MGT, 0x0, 0x0), PIR3)
}
}
Device(LNK4) {
Name(_HID, 0x0f0cd041)
Name(_UID, 0x5)
Method(_STA) {
If(PIR4) {
Return(0xb)
}
Else {
Return(0x9)
}
}
Method(_PRS) {
Return(IPRS)
}
Method(_DIS) {
Store(0x0, PIR4)
}
Method(_CRS) {
Store(IPRS, Local0)
CreateWordField(Local0, 0x1, IRA0)
Store(PIR4, Local1)
Store(DerefOf(Index(IXLT, Local1, )), IRA0)
Return(Local0)
}
Method(_SRS, 1) {
CreateWordField(Arg0, 0x1, IRA0)
Store(Match(IXLT, MEQ, IRA0, MGT, 0x0, 0x0), PIR4)
}
}
Device(LNK5) {
Name(_HID, 0x0f0cd041)
Name(_UID, 0x6)
Method(_STA) {
If(PIR5) {
Return(0xb)
}
Else {
Return(0x9)
}
}
Method(_PRS) {
Return(IPRS)
}
Method(_DIS) {
Store(0x0, PIR5)
}
Method(_CRS) {
Store(IPRS, Local0)
CreateWordField(Local0, 0x1, IRA0)
Store(PIR5, Local1)
Store(DerefOf(Index(IXLT, Local1, )), IRA0)
Return(Local0)
}
Method(_SRS, 1) {
CreateWordField(Arg0, 0x1, IRA0)
Store(Match(IXLT, MEQ, IRA0, MGT, 0x0, 0x0), PIR5)
}
}
Device(LNK6) {
Name(_HID, 0x0f0cd041)
Name(_UID, 0x7)
Method(_STA) {
If(PIR6) {
Return(0xb)
}
Else {
Return(0x9)
}
}
Method(_PRS) {
Return(IPRS)
}
Method(_DIS) {
Store(0x0, PIR6)
}
Method(_CRS) {
Store(IPRS, Local0)
CreateWordField(Local0, 0x1, IRA0)
Store(PIR6, Local1)
Store(DerefOf(Index(IXLT, Local1, )), IRA0)
Return(Local0)
}
Method(_SRS, 1) {
CreateWordField(Arg0, 0x1, IRA0)
Store(Match(IXLT, MEQ, IRA0, MGT, 0x0, 0x0), PIR6)
}
}
Device(LNK7) {
Name(_HID, 0x0f0cd041)
Name(_UID, 0x8)
Method(_STA) {
If(PIR7) {
Return(0xb)
}
Else {
Return(0x9)
}
}
Method(_PRS) {
Return(IPRS)
}
Method(_DIS) {
Store(0x0, PIR7)
}
Method(_CRS) {
Store(IPRS, Local0)
CreateWordField(Local0, 0x1, IRA0)
Store(PIR7, Local1)
Store(DerefOf(Index(IXLT, Local1, )), IRA0)
Return(Local0)
}
Method(_SRS, 1) {
CreateWordField(Arg0, 0x1, IRA0)
Store(Match(IXLT, MEQ, IRA0, MGT, 0x0, 0x0), PIR7)
}
}
Device(LNK8) {
Name(_HID, 0x0f0cd041)
Name(_UID, 0x9)
Method(_STA) {
If(PIR8) {
Return(0xb)
}
Else {
Return(0x9)
}
}
Method(_PRS) {
Return(IPRS)
}
Method(_DIS) {
Store(0x0, PIR8)
}
Method(_CRS) {
Store(IPRS, Local0)
CreateWordField(Local0, 0x1, IRA0)
Store(PIR8, Local1)
Store(DerefOf(Index(IXLT, Local1, )), IRA0)
Return(Local0)
}
Method(_SRS, 1) {
CreateWordField(Arg0, 0x1, IRA0)
Store(Match(IXLT, MEQ, IRA0, MGT, 0x0, 0x0), PIR8)
}
}
Device(DMAC) {
Name(_HID, 0x0002d041)
Name(_CRS, Buffer(0x1d) {0x47, 0x1, 0x0, 0x0, 0x0, 0x0, 0x1, 0x10, 0x47, 0x1, 0x81, 0x0, 0x81, 0x0, 0x1, 0xf, 0x47, 0x1, 0xc0, 0x0, 0xc0, 0x0, 0x1, 0x20, 0x2a, 0x10, 0x1, 0x79, 0x0 })
}
Device(PIC_) {
Name(_HID, 0xd041)
Name(_CRS, Buffer(0x16) {0x47, 0x1, 0x20, 0x0, 0x20, 0x0, 0x1, 0x2, 0x47, 0x1, 0xa0, 0x0, 0xa0, 0x0, 0x1, 0x2, 0x23, 0x4, 0x0, 0x1, 0x79, 0x0 })
}
Device(TIME) {
Name(_HID, 0x0001d041)
Name(_CRS, Buffer(0xe) {0x47, 0x1, 0x40, 0x0, 0x40, 0x0, 0x1, 0x4, 0x23, 0x1, 0x0, 0x1, 0x79, 0x0 })
}
Device(RTC_) {
Name(_HID, 0x000bd041)
Name(_CRS, Buffer(0xe) {0x47, 0x1, 0x70, 0x0, 0x70, 0x0, 0x1, 0x2, 0x23, 0x0, 0x1, 0x1, 0x79, 0x0 })
}
Device(MATH) {
Name(_HID, 0x040cd041)
Name(_CRS, Buffer(0xe) {0x47, 0x1, 0xf0, 0x0, 0xf0, 0x0, 0x1, 0xf, 0x23, 0x0, 0x20, 0x1, 0x79, 0x0 })
}
Device(SPKR) {
Name(_HID, 0x0008d041)
Name(_CRS, Buffer(0xa) {0x47, 0x1, 0x61, 0x0, 0x61, 0x0, 0x1, 0x1, 0x79, 0x0 })
}
Device(KBC0) {
Name(_HID, 0x0303d041)
Name(_PRW, Package(0x2) {
0x1,
0x3,
})
Name(_CRS, Buffer(0x16) {0x47, 0x1, 0x60, 0x0, 0x60, 0x0, 0x1, 0x1, 0x47, 0x1, 0x64, 0x0, 0x64, 0x0, 0x1, 0x1, 0x23, 0x2, 0x0, 0x1, 0x79, 0x0 })
Method(_PSW, 1) {
If(Arg0) {
If(\_SB_.PCI0.ISA_.EC__.ECOK) {
Store(0x1, \_SB_.PCI0.ISA_.EC__.Z000)
}
}
Else {
If(\_SB_.PCI0.ISA_.EC__.ECOK) {
Store(0x0, \_SB_.PCI0.ISA_.EC__.Z000)
}
}
}
}
Device(MSE0) {
Name(_HID, "*SYN0100")
Name(_CID, Package(0x2) {
0x02002e4f,
0x130fd041,
})
Name(_PRW, Package(0x2) {
0x1,
0x3,
})
Name(_CRS, Buffer(0x6) {0x23, 0x0, 0x10, 0x1, 0x79, 0x0 })
Method(_PSW, 1) {
If(Arg0) {
If(\_SB_.PCI0.ISA_.EC__.ECOK) {
Store(0x1, \_SB_.PCI0.ISA_.EC__.TME0)
}
}
Else {
If(\_SB_.PCI0.ISA_.EC__.ECOK) {
Store(0x0, \_SB_.PCI0.ISA_.EC__.TME0)
}
}
}
}
Device(SYSR) {
Name(_HID, 0x020cd041)
Name(_CRS, Buffer(0x4a) {0x47, 0x1, 0x80, 0x0, 0x80, 0x0, 0x1, 0x1, 0x47, 0x1, 0xb1, 0x0, 0xb1, 0x0, 0x1, 0x3, 0x47, 0x1, 0x92, 0x0, 0x92, 0x0, 0x1, 0x1, 0x47, 0x1, 0xb, 0x4, 0xb, 0x4, 0x1, 0x1, 0x47, 0x1, 0x80, 0x4, 0x80, 0x4, 0x1, 0x10, 0x47, 0x1, 0xd0, 0x4, 0xd0, 0x4, 0x1, 0x2, 0x47, 0x1, 0xd6, 0x4, 0xd6, 0x4, 0x1, 0x1, 0x47, 0x1, 0x0, 0x80, 0x0, 0x80, 0x1, 0x80, 0x47, 0x1, 0x0, 0xf5, 0x0, 0xf5, 0x1, 0x4, 0x79, 0x0 })
}
Device(MEM_) {
Name(_HID, 0x010cd041)
Name(MSRC, Buffer(0x3e) {0x86, 0x9, 0x0, 0x1, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0xa, 0x0, 0x86, 0x9, 0x0, 0x0, 0x0, 0xc0, 0xd, 0x0, 0x0, 0x40, 0x0, 0x0, 0x86, 0x9, 0x0, 0x0, 0x0, 0x0, 0xe, 0x0, 0x0, 0x0, 0x2, 0x0, 0x86, 0x9, 0x0, 0x1, 0x0, 0x0, 0x10, 0x0, 0x0, 0x0, 0xf0, 0x7, 0x86, 0x9, 0x0, 0x0, 0x0, 0x0, 0xf8, 0xff, 0x0, 0x0, 0x8, 0x0, 0x79, 0x0 })
Method(_CRS) {
CreateDWordField(MSRC, 0x2c, EMLN)
Subtract(\_SB_.PCI0.TOM_(), 0x00100000, EMLN)
Return(MSRC)
}
Method(_STA) {
Return(0xf)
}
}
OperationRegion(SMI0, SystemIO, 0x0000f500, 0x00000002)
Field(SMI0, AnyAcc, NoLock, Preserve) {
SMIC, 8
}
OperationRegion(SMI1, SystemMemory, 0x0eeffd4d, 0x00000200)
Field(SMI1, AnyAcc, NoLock, Preserve) {
BCMD, 8,
DID_, 32,
INFO, 1024
}
Field(SMI1, AnyAcc, NoLock, Preserve) {
AccessAs(ByteAcc, 0),
Offset(0x5),
INF_, 8
}
Device(SIO_) {
Name(_HID, 0x050ad041)
Device(LPT_) {
Name(MCD_, 0x15)
Name(_HID, 0x0004d041)
Name(_UID, 0x1)
Method(_CRS) {
If(And(_STA(), 0x2, )) {
Acquire(PSMX, 0xffff)
Store(0x0, BCMD)
Store(MCD_, DID_)
Store(Zero, SMIC)
Store(INFO, Local0)
Release(PSMX)
Return(Local0)
}
Return(RSRC)
}
Method(B_SR, 1) {
Acquire(PSMX, 0xffff)
Store(0x1, BCMD)
Store(MCD_, DID_)
Store(Arg0, INFO)
Store(Zero, SMIC)
Release(PSMX)
}
Method(B_PR) {
Acquire(PSMX, 0xffff)
Store(0x2, BCMD)
Store(MCD_, DID_)
Store(Zero, SMIC)
Store(INFO, Local0)
Release(PSMX)
Return(Local0)
}
Method(B_DI) {
Acquire(PSMX, 0xffff)
Store(0x3, BCMD)
Store(MCD_, DID_)
Store(Zero, SMIC)
Release(PSMX)
}
Method(_STA) {
Acquire(PSMX, 0xffff)
Store(0x4, BCMD)
Store(MCD_, DID_)
Store(Zero, SMIC)
Store(INF_, Local0)
Release(PSMX)
Return(Local0)
}
Name(RSRC, Buffer(0xd) {0x47, 0x1, 0x0, 0x1, 0x0, 0x1, 0x1, 0x8, 0x22, 0x0, 0x0, 0x79, 0x0 })
}
Device(LPTB) {
Name(MCD_, 0x16)
Name(_HID, 0x0004d041)
Name(_UID, 0x2)
Name(RSRC, Buffer(0xd) {0x47, 0x1, 0x0, 0x1, 0x0, 0x1, 0x1, 0x8, 0x22, 0x0, 0x0, 0x79, 0x0 })
Method(_CRS) {
If(And(_STA(), 0x2, )) {
Acquire(PSMX, 0xffff)
Store(0x0, BCMD)
Store(MCD_, DID_)
Store(Zero, SMIC)
Store(INFO, Local0)
Release(PSMX)
Return(Local0)
}
Return(RSRC)
}
Method(B_SR, 1) {
Acquire(PSMX, 0xffff)
Store(0x1, BCMD)
Store(MCD_, DID_)
Store(Arg0, INFO)
Store(Zero, SMIC)
Release(PSMX)
}
Method(B_PR) {
Acquire(PSMX, 0xffff)
Store(0x2, BCMD)
Store(MCD_, DID_)
Store(Zero, SMIC)
Store(INFO, Local0)
Release(PSMX)
Return(Local0)
}
Method(B_DI) {
Acquire(PSMX, 0xffff)
Store(0x3, BCMD)
Store(MCD_, DID_)
Store(Zero, SMIC)
Release(PSMX)
}
Method(_STA) {
Acquire(PSMX, 0xffff)
Store(0x4, BCMD)
Store(MCD_, DID_)
Store(Zero, SMIC)
Store(INF_, Local0)
Release(PSMX)
Return(Local0)
}
}
Device(ECP_) {
Name(MCD_, 0xf)
Name(_HID, 0x0104d041)
Name(_UID, 0x1)
Name(RSRC, Buffer(0x10) {0x47, 0x1, 0x0, 0x1, 0x0, 0x1, 0x1, 0x8, 0x22, 0x0, 0x0, 0x2a, 0x0, 0x0, 0x79, 0x0 })
Method(_CRS) {
If(And(_STA(), 0x2, )) {
Acquire(PSMX, 0xffff)
Store(0x0, BCMD)
Store(MCD_, DID_)
Store(Zero, SMIC)
Store(INFO, Local0)
Release(PSMX)
Return(Local0)
}
Return(RSRC)
}
Method(_SRS, 1) {
Acquire(PSMX, 0xffff)
Store(0x1, BCMD)
Store(MCD_, DID_)
Store(Arg0, INFO)
Store(Zero, SMIC)
Release(PSMX)
}
Method(_PRS) {
Acquire(PSMX, 0xffff)
Store(0x2, BCMD)
Store(MCD_, DID_)
Store(Zero, SMIC)
Store(INFO, Local0)
Release(PSMX)
Return(Local0)
}
Method(_DIS) {
Acquire(PSMX, 0xffff)
Store(0x3, BCMD)
Store(MCD_, DID_)
Store(Zero, SMIC)
Release(PSMX)
}
Method(_STA) {
Acquire(PSMX, 0xffff)
Store(0x4, BCMD)
Store(MCD_, DID_)
Store(Zero, SMIC)
Store(INF_, Local0)
Release(PSMX)
Return(Local0)
}
}
Device(EPP_) {
Name(MCD_, 0xe)
Name(_HID, 0x0004d041)
Name(_UID, 0x3)
Name(RSRC, Buffer(0xd) {0x47, 0x1, 0x0, 0x1, 0x0, 0x1, 0x1, 0x8, 0x22, 0x0, 0x0, 0x79, 0x0 })
Method(_CRS) {
If(And(_STA(), 0x2, )) {
Acquire(PSMX, 0xffff)
Store(0x0, BCMD)
Store(MCD_, DID_)
Store(Zero, SMIC)
Store(INFO, Local0)
Release(PSMX)
Return(Local0)
}
Return(RSRC)
}
Method(B_SR, 1) {
Acquire(PSMX, 0xffff)
Store(0x1, BCMD)
Store(MCD_, DID_)
Store(Arg0, INFO)
Store(Zero, SMIC)
Release(PSMX)
}
Method(B_PR) {
Acquire(PSMX, 0xffff)
Store(0x2, BCMD)
Store(MCD_, DID_)
Store(Zero, SMIC)
Store(INFO, Local0)
Release(PSMX)
Return(Local0)
}
Method(B_DI) {
Acquire(PSMX, 0xffff)
Store(0x3, BCMD)
Store(MCD_, DID_)
Store(Zero, SMIC)
Release(PSMX)
}
Method(_STA) {
Acquire(PSMX, 0xffff)
Store(0x4, BCMD)
Store(MCD_, DID_)
Store(Zero, SMIC)
Store(INF_, Local0)
Release(PSMX)
Return(Local0)
}
}
Device(COMB) {
Name(MCD_, 0x11)
Name(_HID, 0x0005d041)
Name(_UID, 0x2)
Name(RSRC, Buffer(0xd) {0x47, 0x1, 0x0, 0x1, 0x0, 0x1, 0x1, 0x8, 0x22, 0x0, 0x0, 0x79, 0x0 })
Method(_CRS) {
If(And(_STA(), 0x2, )) {
Acquire(PSMX, 0xffff)
Store(0x0, BCMD)
Store(MCD_, DID_)
Store(Zero, SMIC)
Store(INFO, Local0)
Release(PSMX)
Return(Local0)
}
Return(RSRC)
}
Method(B_SR, 1) {
Acquire(PSMX, 0xffff)
Store(0x1, BCMD)
Store(MCD_, DID_)
Store(Arg0, INFO)
Store(Zero, SMIC)
Release(PSMX)
}
Method(B_PR) {
Acquire(PSMX, 0xffff)
Store(0x2, BCMD)
Store(MCD_, DID_)
Store(Zero, SMIC)
Store(INFO, Local0)
Release(PSMX)
Return(Local0)
}
Method(B_DI) {
Acquire(PSMX, 0xffff)
Store(0x3, BCMD)
Store(MCD_, DID_)
Store(Zero, SMIC)
Release(PSMX)
}
Method(_STA) {
Acquire(PSMX, 0xffff)
Store(0x4, BCMD)
Store(MCD_, DID_)
Store(Zero, SMIC)
Store(INF_, Local0)
Release(PSMX)
Return(Local0)
}
}
Device(IRDA) {
Name(MCD_, 0x12)
Name(_HID, 0x1005d041)
Name(_UID, 0x1)
Name(RSRC, Buffer(0xd) {0x47, 0x1, 0x0, 0x1, 0x0, 0x1, 0x1, 0x8, 0x22, 0x0, 0x0, 0x79, 0x0 })
Method(_CRS) {
If(And(_STA(), 0x2, )) {
Acquire(PSMX, 0xffff)
Store(0x0, BCMD)
Store(MCD_, DID_)
Store(Zero, SMIC)
Store(INFO, Local0)
Release(PSMX)
Return(Local0)
}
Return(RSRC)
}
Method(B_SR, 1) {
Acquire(PSMX, 0xffff)
Store(0x1, BCMD)
Store(MCD_, DID_)
Store(Arg0, INFO)
Store(Zero, SMIC)
Release(PSMX)
}
Method(B_PR) {
Acquire(PSMX, 0xffff)
Store(0x2, BCMD)
Store(MCD_, DID_)
Store(Zero, SMIC)
Store(INFO, Local0)
Release(PSMX)
Return(Local0)
}
Method(B_DI) {
Acquire(PSMX, 0xffff)
Store(0x3, BCMD)
Store(MCD_, DID_)
Store(Zero, SMIC)
Release(PSMX)
}
Method(_STA) {
Acquire(PSMX, 0xffff)
Store(0x4, BCMD)
Store(MCD_, DID_)
Store(Zero, SMIC)
Store(INF_, Local0)
Release(PSMX)
Return(Local0)
}
}
Device(BASK) {
Name(MCD_, 0x13)
Name(_HID, 0x1005d041)
Name(_UID, 0x2)
Name(RSRC, Buffer(0xd) {0x47, 0x1, 0x0, 0x1, 0x0, 0x1, 0x1, 0x8, 0x22, 0x0, 0x0, 0x79, 0x0 })
Method(_CRS) {
If(And(_STA(), 0x2, )) {
Acquire(PSMX, 0xffff)
Store(0x0, BCMD)
Store(MCD_, DID_)
Store(Zero, SMIC)
Store(INFO, Local0)
Release(PSMX)
Return(Local0)
}
Return(RSRC)
}
Method(B_SR, 1) {
Acquire(PSMX, 0xffff)
Store(0x1, BCMD)
Store(MCD_, DID_)
Store(Arg0, INFO)
Store(Zero, SMIC)
Release(PSMX)
}
Method(B_PR) {
Acquire(PSMX, 0xffff)
Store(0x2, BCMD)
Store(MCD_, DID_)
Store(Zero, SMIC)
Store(INFO, Local0)
Release(PSMX)
Return(Local0)
}
Method(B_DI) {
Acquire(PSMX, 0xffff)
Store(0x3, BCMD)
Store(MCD_, DID_)
Store(Zero, SMIC)
Release(PSMX)
}
Method(_STA) {
Acquire(PSMX, 0xffff)
Store(0x4, BCMD)
Store(MCD_, DID_)
Store(Zero, SMIC)
Store(INF_, Local0)
Release(PSMX)
Return(Local0)
}
}
Device(FIR_) {
Name(MCD_, 0x14)
Name(_HID, 0x23518905)
Name(_CID, 0x1005d041)
Name(_UID, 0x3)
Name(RSRC, Buffer(0x10) {0x47, 0x1, 0x0, 0x1, 0x0, 0x1, 0x1, 0x8, 0x22, 0x0, 0x0, 0x2a, 0x0, 0x0, 0x79, 0x0 })
Method(_CRS) {
If(And(_STA(), 0x2, )) {
Acquire(PSMX, 0xffff)
Store(0x0, BCMD)
Store(MCD_, DID_)
Store(Zero, SMIC)
Store(INFO, Local0)
Release(PSMX)
Return(Local0)
}
Return(RSRC)
}
Method(B_SR, 1) {
Acquire(PSMX, 0xffff)
Store(0x1, BCMD)
Store(MCD_, DID_)
Store(Arg0, INFO)
Store(Zero, SMIC)
Release(PSMX)
}
Method(B_PR) {
Acquire(PSMX, 0xffff)
Store(0x2, BCMD)
Store(MCD_, DID_)
Store(Zero, SMIC)
Store(INFO, Local0)
Release(PSMX)
Return(Local0)
}
Method(B_DI) {
Acquire(PSMX, 0xffff)
Store(0x3, BCMD)
Store(MCD_, DID_)
Store(Zero, SMIC)
Release(PSMX)
}
Method(_STA) {
Acquire(PSMX, 0xffff)
Store(0x4, BCMD)
Store(MCD_, DID_)
Store(Zero, SMIC)
Store(INF_, Local0)
Release(PSMX)
Return(Local0)
}
}
Device(FDC_) {
Name(MCD_, 0x10)
Name(_HID, 0x0007d041)
Name(RSRC, Buffer(0x18) {0x47, 0x1, 0x0, 0x1, 0x0, 0x1, 0x1, 0x6, 0x47, 0x1, 0x7, 0x1, 0x7, 0x1, 0x1, 0x1, 0x22, 0x0, 0x0, 0x2a, 0x0, 0x0, 0x79, 0x0 })
Method(_CRS) {
If(And(_STA(), 0x2, )) {
Acquire(PSMX, 0xffff)
Store(0x0, BCMD)
Store(MCD_, DID_)
Store(Zero, SMIC)
Store(INFO, Local0)
Release(PSMX)
Return(Local0)
}
Return(RSRC)
}
Method(_SRS, 1) {
Acquire(PSMX, 0xffff)
Store(0x1, BCMD)
Store(MCD_, DID_)
Store(Arg0, INFO)
Store(Zero, SMIC)
Release(PSMX)
}
Method(_PRS) {
Acquire(PSMX, 0xffff)
Store(0x2, BCMD)
Store(MCD_, DID_)
Store(Zero, SMIC)
Store(INFO, Local0)
Release(PSMX)
Return(Local0)
}
Method(_DIS) {
Acquire(PSMX, 0xffff)
Store(0x3, BCMD)
Store(MCD_, DID_)
Store(Zero, SMIC)
Release(PSMX)
}
Method(_STA) {
Acquire(PSMX, 0xffff)
Store(0x4, BCMD)
Store(MCD_, DID_)
Store(Zero, SMIC)
Store(INF_, Local0)
Release(PSMX)
Return(Local0)
}
}
}
Device(EC__) {
Name(_HID, 0x090cd041)
Name(_GPE, 0x18)
Name(ECOK, 0x0)
Method(_REG, 2) {
If(LEqual(Arg0, 0x3)) {
Store(Arg1, ECOK)
Store(Arg1, \_SB_.PCI0.ECOK)
}
}
Name(_CRS, Buffer(0x12) {0x47, 0x1, 0x62, 0x0, 0x62, 0x0, 0x1, 0x1, 0x47, 0x1, 0x66, 0x0, 0x66, 0x0, 0x1, 0x1, 0x79, 0x0 })
OperationRegion(ERAM, EmbeddedControl, 0x0, 0xff)
Field(ERAM, ByteAcc, NoLock, Preserve) {
Offset(0x4),
CMCM, 8,
CMD1, 8,
CMD2, 8,
CMD3, 8
}
Field(ERAM, AnyAcc, NoLock, Preserve) {
Offset(0x80),
NMSG, 8,
SLED, 4,
SLPT, 4,
MODE, 1,
Z000, 1,
ACPI, 1,
PWBN, 1,
TME0, 1,
TME1, 1,
FANC, 1,
DETF, 1,
LIDS, 1,
LWKE, 1,
IWKE, 1,
INTM, 1,
MWKE, 1,
COMM, 1,
PME_, 1,
Offset(0x84),
ADP_, 1,
AFLT, 1,
BATP, 1,
, 1,
BATL, 1,
BATC, 1,
Offset(0x85),
BPU_, 32,
BDC_, 32,
BFC_, 32,
BTC_, 32,
BDV_, 32,
BST_, 32,
BPR_, 32,
BRC_, 32,
BPV_, 32,
BTP_, 32,
BCW_, 32,
BCL_, 32,
BCG_, 32,
BG2_, 32,
BMO_, 32,
BIF_, 64,
BSN0, 32,
BSN1, 32,
BTY0, 8,
BTY1, 8,
BTY2, 8,
BTY3, 8,
AC0_, 16,
PSV_, 16,
CRT_, 16,
TMP_, 16,
NABT, 8,
Offset(0xe2)
}
Mutex(MTX0, 0)
Mutex(MTX1, 0)
Method(_Q0B) {
Notify(\_SB_.SLPB, 0x80)
}
Method(_Q06) {
Store(0x8c, \_SB_.PCI0.ISA_.BCMD)
Store(Zero, \_SB_.PCI0.ISA_.SMIC)
Store("AC Adapter In/Out", Debug)
Store(\_SB_.PCI0.ADP_, Local0)
If(ADP_) {
Notify(\_SB_.AC__, 0x0)
Store(0x88, \_SB_.PCI0.ISA_.BCMD)
Store(Zero, \_SB_.PCI0.ISA_.SMIC)
}
Else {
Notify(\_SB_.AC__, 0x1)
Store(0x89, \_SB_.PCI0.ISA_.BCMD)
Store(Zero, \_SB_.PCI0.ISA_.SMIC)
}
}
Method(_Q08) {
Store(0x8c, \_SB_.PCI0.ISA_.BCMD)
Store(Zero, \_SB_.PCI0.ISA_.SMIC)
Store("Battery In/Out", Debug)
\_SB_.BAT0.Z001()
}
Method(_Q09) {
Store("Battery charge/discharge", Debug)
\_SB_.BAT0.UBST()
Notify(\_SB_.BAT0, 0x80)
}
Method(_Q03) {
Store("Low Batt 1", Debug)
Notify(\_SB_.BAT0, 0x80)
}
Method(_Q04) {
Store("Low Batt 2", Debug)
Notify(\_SB_.BAT0, 0x80)
}
Method(_Q0A) {
Store("Lid runtime event", Debug)
Notify(\_SB_.LID_, 0x80)
}
Method(_Q07) {
Store("Thermal status change event", Debug)
Notify(\_TZ_.THRM, 0x80)
}
Method(_Q10) {
Store("_Q10 Enevt", Debug)
Store(Zero, Local1)
Store(0x94, \_SB_.PCI0.ISA_.BCMD)
Store(Zero, \_SB_.PCI0.ISA_.SMIC)
Store(0x54, \_SB_.PCI0.AGP_.VGA_.CMID)
Store(\_SB_.PCI0.AGP_.VGA_.CMDA, Local1)
If(Local1) {
If(\_SB_.PCI0.AGP_.VGA_.OSF_) {
Store(\_SB_.PCI0.AGP_.VGA_.TOGF, Local0)
Store(0x8a, \_SB_.PCI0.ISA_.BCMD)
Store(Zero, \_SB_.PCI0.ISA_.SMIC)
Store(0x52, \_SB_.PCI0.AGP_.VGA_.CMID)
Store(\_SB_.PCI0.AGP_.VGA_.CMDA, Local3)
Store(0x53, \_SB_.PCI0.AGP_.VGA_.CMID)
Store(\_SB_.PCI0.AGP_.VGA_.CMDA, Local4)
Store(One, Local5)
Store(Zero, Local6)
If(Local3) {
Add(Local5, 0x2, Local5)
}
If(Local4) {
Add(Local5, 0x4, Local5)
}
If(LGreater(Local0, 0x6)) {
Store(Zero, \_SB_.PCI0.AGP_.VGA_.TOGF)
Store(Zero, Local0)
}
Increment(Local0)
And(Local5, Local0, Local6)
If(LEqual(Local6, Local0)) {
Store(Zero, Local3)
}
Else {
Store(One, Local3)
}
While(Local3) {
Increment(Local0)
And(Local5, Local0, Local6)
If(LEqual(Local6, Local0)) {
Store(Zero, Local3)
}
Else {
Store(One, Local3)
}
If(LGreater(Local0, 0x6)) {
Store(Zero, Local0)
}
}
Store(Local0, \_SB_.PCI0.AGP_.VGA_.TOGF)
If(LEqual(Local6, 0x1)) {
Store(One, \_SB_.PCI0.AGP_.VGA_.LCDA)
Store(Zero, \_SB_.PCI0.AGP_.VGA_.CRTA)
Store(Zero, \_SB_.PCI0.AGP_.VGA_.TVOA)
}
If(LEqual(Local6, 0x2)) {
Store(Zero, \_SB_.PCI0.AGP_.VGA_.LCDA)
Store(One, \_SB_.PCI0.AGP_.VGA_.CRTA)
Store(Zero, \_SB_.PCI0.AGP_.VGA_.TVOA)
}
If(LEqual(Local6, 0x3)) {
Store(One, \_SB_.PCI0.AGP_.VGA_.LCDA)
Store(One, \_SB_.PCI0.AGP_.VGA_.CRTA)
Store(Zero, \_SB_.PCI0.AGP_.VGA_.TVOA)
}
If(LEqual(Local6, 0x4)) {
Store(Zero, \_SB_.PCI0.AGP_.VGA_.LCDA)
Store(Zero, \_SB_.PCI0.AGP_.VGA_.CRTA)
Store(One, \_SB_.PCI0.AGP_.VGA_.TVOA)
}
If(LEqual(Local6, 0x5)) {
Store(One, \_SB_.PCI0.AGP_.VGA_.LCDA)
Store(Zero, \_SB_.PCI0.AGP_.VGA_.CRTA)
Store(One, \_SB_.PCI0.AGP_.VGA_.TVOA)
}
If(LEqual(Local6, 0x6)) {
Store(Zero, \_SB_.PCI0.AGP_.VGA_.LCDA)
Store(One, \_SB_.PCI0.AGP_.VGA_.CRTA)
Store(One, \_SB_.PCI0.AGP_.VGA_.TVOA)
}
If(LEqual(Local6, 0x7)) {
Store(One, \_SB_.PCI0.AGP_.VGA_.LCDA)
Store(One, \_SB_.PCI0.AGP_.VGA_.CRTA)
Store(One, \_SB_.PCI0.AGP_.VGA_.TVOA)
}
If(\_SB_.PCI0.AGP_.VGA_.OSF_) {
Notify(\_SB_.PCI0.AGP_.VGA_, 0x80)
}
Else {
Store(0x8e, \_SB_.PCI0.ISA_.BCMD)
Store(Zero, \_SB_.PCI0.ISA_.SMIC)
}
}
Else {
Store(0x8e, \_SB_.PCI0.ISA_.BCMD)
Store(Zero, \_SB_.PCI0.ISA_.SMIC)
Notify(\_SB_.PCI0.AGP_.VGA_, 0x80)
}
}
}
}
}
Device(IDE_) {
Name(_ADR, 0x00100000)
Name(UDMT, Package(0x8) {
0x1e,
0x2d,
0x3c,
0x5a,
0x78,
0x78,
0x78,
0x14,
})
Name(PIOT, Package(0x5) {
0x78,
0xb4,
0xf0,
0x017f,
0x0258,
})
Name(PIOC, Package(0x5) {
0x4,
0x6,
0x8,
0xd,
0x10,
})
Name(CBCT, Package(0x5) {
0x31,
0x33,
0x1,
0x3,
0xa,
})
Name(DACT, Package(0x5) {
0x3,
0x3,
0x4,
0x5,
0x8,
})
Name(DRCT, Package(0x5) {
0x1,
0x3,
0x4,
0x8,
0x8,
})
Name(PXLM, Package(0x5) {
0x2,
0x1,
0x0,
0x0,
0x0,
})
OperationRegion(PCI_, PCI_Config, 0x0, 0x60)
Field(PCI_, ByteAcc, NoLock, Preserve) {
Offset(0x9),
, 4,
SCHE, 1,
PCHE, 1,
Offset(0xa),
Offset(0xd),
IDLT, 8,
Offset(0x4b),
U66E, 1,
Offset(0x4c),
Offset(0x53),
CDFI, 1,
CDUD, 1,
Offset(0x54),
PFTH, 8,
SFTH, 8,
PUDC, 8,
SUDC, 8,
PAST, 8,
PCBT, 8,
PTM0, 8,
PTM1, 8,
SAST, 8,
SCBT, 8,
STM0, 8,
STM1, 8
}
Method(GTM_, 3) {
Store(Buffer(0x14) { }, Local0)
CreateDWordField(Local0, 0x0, PIO0)
CreateDWordField(Local0, 0x4, DMA0)
CreateDWordField(Local0, 0x8, PIO1)
CreateDWordField(Local0, 0xc, DMA1)
CreateDWordField(Local0, 0x10, FLAG)
Store(Zero, PIO0)
Store(Zero, DMA0)
Store(Zero, PIO1)
Store(Zero, DMA1)
Store(Zero, FLAG)
If(Arg0) {
ShiftRight(And(Arg0, 0x70, ), 0x4, Local1)
If(LEqual(Local1, Zero)) {
Store(0x8, Local1)
}
Add(And(Arg0, 0xf, Local2), Local1, Local1)
Store(Match(^PIOC, MLE, Local1, MTR, 0x0, 0x0), Local2)
Store(DerefOf(Index(^PIOT, Local2, )), PIO0)
If(LNot(LGreater(PIO0, 0xf0))) {
Or(FLAG, 0x2, FLAG)
}
}
If(And(Arg2, 0x8, )) {
Store(DerefOf(Index(^UDMT, And(Arg2, 0x7, ), )), DMA0)
Or(FLAG, 0x1, FLAG)
}
Else {
Store(PIO0, DMA0)
}
If(Arg1) {
ShiftRight(And(Arg1, 0x70, ), 0x4, Local1)
If(LEqual(Local1, Zero)) {
Store(0x8, Local1)
}
Add(And(Arg1, 0xf, Local2), Local1, Local1)
Store(Match(^PIOC, MLE, Local1, MTR, 0x0, 0x0), Local2)
Store(DerefOf(Index(^PIOT, Local2, )), PIO1)
If(LNot(LGreater(PIO1, 0xf0))) {
Or(FLAG, 0x8, FLAG)
}
}
If(And(Arg2, 0x80, )) {
Store(DerefOf(Index(^UDMT, ShiftRight(And(Arg2, 0x70, ), 0x4, ), )), DMA1)
Or(FLAG, 0x4, FLAG)
}
Else {
Store(PIO1, DMA1)
}
Or(FLAG, 0x10, FLAG)
Return(Local0)
}
Method(STM_, 3) {
Store(Buffer(0x6) {0x0, 0x0, 0x0, 0x0, 0x0, 0x0 }, Local7)
CreateByteField(Local7, 0x0, TM0_)
CreateByteField(Local7, 0x1, TM1_)
CreateByteField(Local7, 0x2, UDC_)
CreateByteField(Local7, 0x3, AST_)
CreateByteField(Local7, 0x4, CBT_)
CreateByteField(Local7, 0x5, U66_)
CreateDWordField(Arg0, 0x0, PIO0)
CreateDWordField(Arg0, 0x4, DMA0)
CreateDWordField(Arg0, 0x8, PIO1)
CreateDWordField(Arg0, 0xc, DMA1)
CreateDWordField(Arg0, 0x10, FLAG)
Store(FLAG, Local6)
Store(Ones, Local4)
If(LOr(DMA0, PIO0)) {
If(LAnd(DMA0, LNot(PIO0))) {
If(And(Local6, 0x1, )) {
If(LAnd(LLess(DMA0, 0x1e), LNot(LLess(DMA0, 0xf)))) {
Store(0x7, Local0)
}
Else {
Store(Match(^UDMT, MGE, DMA0, MTR, 0x0, 0x0), Local0)
}
Or(Local0, 0x8, UDC_)
If(LLess(DMA0, 0x3c)) {
Store(One, U66_)
}
}
Store(Match(^PIOT, MGE, DMA0, MTR, 0x0, 0x0), Local0)
Store(DerefOf(Index(^DACT, Local0, )), Local2)
Store(DerefOf(Index(^DRCT, Local0, )), Local3)
Add(Local3, ShiftLeft(Local2, 0x4, ), TM0_)
Store(Local0, Local4)
}
If(LAnd(LNot(DMA0), PIO0)) {
Store(Match(^PIOT, MGE, PIO0, MTR, 0x0, 0x0), Local0)
Store(DerefOf(Index(^DACT, Local0, )), Local2)
Store(DerefOf(Index(^DRCT, Local0, )), Local3)
Add(Local3, ShiftLeft(Local2, 0x4, ), TM0_)
Store(Local0, Local4)
}
If(LAnd(DMA0, PIO0)) {
If(And(Local6, 0x1, )) {
If(LAnd(LLess(DMA0, 0x1e), LNot(LLess(DMA0, 0xf)))) {
Store(0x7, Local0)
}
Else {
Store(Match(^UDMT, MGE, DMA0, MTR, 0x0, 0x0), Local0)
}
Or(Local0, 0x8, UDC_)
If(LLess(DMA0, 0x3c)) {
Store(One, U66_)
}
}
If(LNot(LLess(PIO0, DMA0))) {
Store(Match(^PIOT, MGE, PIO0, MTR, 0x0, 0x0), Local0)
Store(Local0, Local4)
}
Else {
Store(Match(^PIOT, MGE, DMA0, MTR, 0x0, 0x0), Local0)
Store(Local0, Local4)
}
Store(DerefOf(Index(^DACT, Local0, )), Local2)
Store(DerefOf(Index(^DRCT, Local0, )), Local3)
Add(Local3, ShiftLeft(Local2, 0x4, ), TM0_)
}
}
Store(Ones, Local5)
If(LOr(DMA1, PIO1)) {
If(LAnd(DMA1, LNot(PIO1))) {
If(And(Local6, 0x4, )) {
If(LAnd(LLess(DMA1, 0x1e), LNot(LLess(DMA1, 0xf)))) {
Store(0x7, Local0)
}
Else {
Store(Match(^UDMT, MGE, DMA1, MTR, 0x0, 0x0), Local0)
}
Or(ShiftLeft(Or(Local0, 0x8, ), 0x4, ), UDC_, UDC_)
If(LLess(DMA1, 0x3c)) {
Store(One, U66_)
}
}
Store(Match(^PIOT, MGE, DMA1, MTR, 0x0, 0x0), Local0)
Store(DerefOf(Index(^DACT, Local0, )), Local2)
Store(DerefOf(Index(^DRCT, Local0, )), Local3)
Add(Local3, ShiftLeft(Local2, 0x4, ), TM1_)
Store(Local0, Local5)
}
If(LAnd(LNot(DMA1), PIO1)) {
Store(Match(^PIOT, MGE, PIO1, MTR, 0x0, 0x0), Local0)
Store(DerefOf(Index(^DACT, Local0, )), Local2)
Store(DerefOf(Index(^DRCT, Local0, )), Local3)
Add(Local3, ShiftLeft(Local2, 0x4, ), TM1_)
Store(Local0, Local5)
}
If(LAnd(DMA1, PIO1)) {
If(And(Local6, 0x4, )) {
If(LAnd(LLess(DMA1, 0x1e), LNot(LLess(DMA1, 0xf)))) {
Store(0x7, Local0)
}
Else {
Store(Match(^UDMT, MGE, DMA1, MTR, 0x0, 0x0), Local0)
}
Or(ShiftLeft(Or(Local0, 0x8, ), 0x4, ), UDC_, UDC_)
If(LLess(DMA1, 0x3c)) {
Store(One, U66_)
}
}
If(LNot(LLess(PIO1, DMA1))) {
Store(Match(^PIOT, MGE, PIO1, MTR, 0x0, 0x0), Local0)
Store(Local0, Local5)
}
Else {
Store(Match(^PIOT, MGE, DMA1, MTR, 0x0, 0x0), Local0)
Store(Local0, Local5)
}
Store(DerefOf(Index(^DACT, Local0, )), Local2)
Store(DerefOf(Index(^DRCT, Local0, )), Local3)
Add(Local3, ShiftLeft(Local2, 0x4, ), TM1_)
}
}
If(LEqual(Local4, Ones)) {
If(LEqual(Local5, Ones)) {
Store(Zero, CBT_)
}
Else {
Store(DerefOf(Index(^CBCT, Local5, )), CBT_)
}
}
Else {
If(LEqual(Local5, Ones)) {
Store(DerefOf(Index(^CBCT, Local4, )), CBT_)
}
Else {
If(LNot(LLess(Local4, Local5))) {
Store(DerefOf(Index(^CBCT, Local4, )), CBT_)
}
Else {
Store(DerefOf(Index(^CBCT, Local5, )), CBT_)
}
}
}
Store(0x2, AST_)
Return(Local7)
}
Method(GTF0, 3) {
Store(Buffer(0x7) {0x3, 0x0, 0x0, 0x0, 0x0, 0xa0, 0xef }, Local7)
CreateByteField(Local7, 0x1, MODE)
If(And(Arg1, 0x8, )) {
And(Arg1, 0x7, Local0)
If(LEqual(Local0, 0x7)) {
Store(0x5, MODE)
}
Else {
Subtract(0x4, Local0, MODE)
}
Or(MODE, 0x40, MODE)
}
Else {
And(Arg2, 0xf, Local0)
Store(Match(^DRCT, MEQ, Local0, MTR, 0x0, 0x0), Local1)
Store(DerefOf(Index(^PXLM, Local1, )), MODE)
Or(MODE, 0x20, MODE)
}
Concatenate(Local7, Local7, Local6)
And(Arg2, 0xf, Local0)
Store(Match(^DRCT, MEQ, Local0, MTR, 0x0, 0x0), Local1)
Subtract(0x4, Local1, MODE)
Or(MODE, 0x8, MODE)
Concatenate(Local6, Local7, Local5)
Return(Local5)
}
Method(GTF1, 3) {
Store(Buffer(0x7) {0x3, 0x0, 0x0, 0x0, 0x0, 0xb0, 0xef }, Local7)
CreateByteField(Local7, 0x1, MODE)
If(And(Arg1, 0x80, )) {
ShiftRight(And(Arg1, 0x70, ), 0x4, Local0)
If(LEqual(Local0, 0x7)) {
Store(0x5, MODE)
}
Else {
Subtract(0x4, Local0, MODE)
}
Or(MODE, 0x40, MODE)
}
Else {
And(Arg2, 0xf, Local0)
Store(Match(^DRCT, MEQ, Local0, MTR, 0x0, 0x0), Local1)
Store(DerefOf(Index(^PXLM, Local1, )), MODE)
Or(MODE, 0x20, MODE)
}
Concatenate(Local7, Local7, Local6)
And(Arg2, 0xf, Local0)
Store(Match(^DRCT, MEQ, Local0, MTR, 0x0, 0x0), Local1)
Subtract(0x4, Local1, MODE)
Or(MODE, 0x8, MODE)
Concatenate(Local6, Local7, Local5)
Return(Local5)
}
Device(PRIM) {
Name(_ADR, 0x0)
Method(_GTM) {
Store("GTM - Primary Controller", Debug)
Store(^^GTM_(^^PTM0, ^^PTM1, ^^PUDC), Local0)
Return(Local0)
}
Method(_STM, 3) {
Store("STM - Primary Controller", Debug)
Store(^^STM_(Arg0, Arg1, Arg2), Local0)
CreateByteField(Local0, 0x0, TM0_)
CreateByteField(Local0, 0x1, TM1_)
CreateByteField(Local0, 0x2, UDC_)
CreateByteField(Local0, 0x3, AST_)
CreateByteField(Local0, 0x4, CBT_)
CreateByteField(Local0, 0x5, U66_)
Store(TM0_, ^^PTM0)
Store(TM1_, ^^PTM1)
Store(UDC_, ^^PUDC)
Store(AST_, ^^PAST)
Store(CBT_, ^^PCBT)
If(U66_) {
Store(U66_, ^^U66E)
}
Store(0x55, ^^PFTH)
}
Device(MAST) {
Name(_ADR, 0x0)
Method(_GTF) {
Store("GTF - Primary Master", Debug)
Store(^^^GTF0(^^^PCHE, ^^^PUDC, ^^^PTM0), Local0)
Return(Local0)
}
}
Device(SLAV) {
Name(_ADR, 0x1)
Method(_GTF) {
Store("GTF - Primary Slave", Debug)
Store(^^^GTF1(^^^PCHE, ^^^PUDC, ^^^PTM1), Local0)
Return(Local0)
}
}
}
Device(SECN) {
Name(_ADR, 0x1)
Method(_GTM) {
Store("GTM - Secondary Controller", Debug)
Store(^^GTM_(^^STM0, ^^STM1, ^^SUDC), Local0)
Return(Local0)
}
Method(_STM, 3) {
Store("STM - Secondary Controller", Debug)
Store(^^STM_(Arg0, Arg1, Arg2), Local0)
CreateByteField(Local0, 0x0, TM0_)
CreateByteField(Local0, 0x1, TM1_)
CreateByteField(Local0, 0x2, UDC_)
CreateByteField(Local0, 0x3, AST_)
CreateByteField(Local0, 0x4, CBT_)
CreateByteField(Local0, 0x5, U66_)
Store(TM0_, ^^STM0)
Store(TM1_, ^^STM1)
Store(UDC_, ^^SUDC)
Store(AST_, ^^SAST)
Store(CBT_, ^^SCBT)
If(U66_) {
Store(U66_, ^^U66E)
}
Store(0x55, ^^SFTH)
}
Device(MAST) {
Name(_ADR, 0x0)
Method(_GTF) {
Store("GTF - Secondary Master", Debug)
Store(^^^GTF0(^^^SCHE, ^^^SUDC, ^^^STM0), Local0)
Return(Local0)
}
}
Device(SLAV) {
Name(_ADR, 0x1)
Method(_GTF) {
Store("GTF - Secondary Slave", Debug)
Store(^^^GTF1(^^^SCHE, ^^^SUDC, ^^^STM1), Local0)
Return(Local0)
}
}
}
}
Device(AGP_) {
Name(_ADR, 0x00010000)
Name(_PRT, Package(0x1) {
Package(0x4) {
0x0005ffff,
0x0,
\_SB_.PCI0.ISA_.LNK2,
0x0,
},
})
Device(VGA_) {
Name(_ADR, 0x00050000)
Name(SWIT, 0x1)
Name(CRTA, 0x1)
Name(LCDA, 0x1)
Name(TVOA, 0x1)
Name(TOGF, 0x1)
Name(OSF_, 0x0)
OperationRegion(CMOS, SystemIO, 0x70, 0x2)
Field(CMOS, ByteAcc, NoLock, Preserve) {
CMID, 8,
CMDA, 8
}
Method(_INI) {
If(LEqual(SCMP(\_OS_, "Microsoft Windows NT"), Zero)) {
Store(One, OSF_)
}
If(LEqual(SizeOf(\_OS_), 0x14)) {
Store(One, OSF_)
}
}
Method(_DOS, 1) {
Store("VGA --_DOS", Debug)
Store(Arg0, SWIT)
}
Method(_DOD) {
Store("VGA --_DOD", Debug)
Return(Package(0x3) {
0x00010100,
0x00010110,
0x00010200,
})
}
Device(CRT_) {
Name(_ADR, 0x0100)
Method(_DCS) {
Store("CRT --_DCS", Debug)
If(CRTA) {
Return(0x1f)
}
Else {
Return(0x1d)
}
}
Method(_DGS) {
Store("CRT --_DGS", Debug)
Store(CRTA, Local0)
If(CRTA) {
Return(0x1)
}
Else {
Return(0x0)
}
}
Method(_DSS, 1) {
Store("CRT --_DSS", Debug)
}
}
Device(LCD_) {
Name(_ADR, 0x0110)
Method(_DCS) {
Store("LCD --_DCS", Debug)
If(LCDA) {
Return(0x1f)
}
Else {
Return(0x1d)
}
}
Method(_DGS) {
Store("LCD --_DGS", Debug)
Store(LCDA, Local0)
If(LCDA) {
Return(0x1)
}
Else {
Return(0x0)
}
}
Method(_DSS, 1) {
Store("LCD --_DSS", Debug)
}
}
Device(TVO_) {
Name(_ADR, 0x0200)
Method(_DCS) {
Store("TVO --_DCS", Debug)
If(TVOA) {
Return(0x1f)
}
Else {
Return(0x1d)
}
}
Method(_DGS) {
Store("TVO --_DGS", Debug)
Store(TVOA, Local0)
If(TVOA) {
Return(0x1)
}
Else {
Return(0x0)
}
}
Method(_DSS, 1) {
Store("TVO --_DSS", Debug)
}
}
}
}
Method(MIN_, 2) {
If(LLess(Arg0, Arg1)) {
Return(Arg0)
}
Else {
Return(Arg1)
}
}
Method(SLEN, 1) {
Return(SizeOf(Arg0))
}
Method(S2BF, 1, Serialized) {
Add(SLEN(Arg0), One, Local0)
Name(BUFF, Buffer(Local0) { })
Store(Arg0, BUFF)
Return(BUFF)
}
Method(SCMP, 2) {
Store(S2BF(Arg0), Local0)
Store(S2BF(Arg1), Local1)
Store(Zero, Local4)
Store(SLEN(Arg0), Local5)
Store(SLEN(Arg1), Local6)
Store(MIN_(Local5, Local6), Local7)
While(LLess(Local4, Local7)) {
Store(DerefOf(Index(Local0, Local4, )), Local2)
Store(DerefOf(Index(Local1, Local4, )), Local3)
If(LGreater(Local2, Local3)) {
Return(One)
}
Else {
If(LLess(Local2, Local3)) {
Return(Ones)
}
}
Increment(Local4)
}
If(LLess(Local4, Local5)) {
Return(One)
}
Else {
If(LLess(Local4, Local6)) {
Return(Ones)
}
Else {
Return(Zero)
}
}
}
Device(CRD0) {
Name(_ADR, 0x000a0000)
Name(_PRW, Package(0x2) {
0x9,
0x3,
})
Method(_INI) {
Or(PMEE, 0x1, PMEE)
}
Method(_PSC) {
Store(PWST, Local0)
Return(Local0)
}
Method(_PS0) {
Store(0x1, PMST)
}
Method(_PS2) {
Store(0x1, PMST)
}
Method(_PS3) {
Store(0x1, PMST)
}
Name(EX03, Zero)
Method(_PSW, 1) {
If(LEqual(Arg0, 0x1)) {
Store(0x0, PWST)
Or(PMEE, 0x1, PMEE)
Store(TI04, Local1)
Store(Or(TI04, 0x1, ), TI04)
Store(0x03e1, TI44)
Store(0x3, TIID)
Store(TIDA, EX03)
Store(Or(EX03, 0x80, ), TIDA)
}
Else {
Store(0x0, PWST)
If(LEqual(PMST, 0x1)) {
Store(0x1, PMST)
Notify(\_SB_.PCI0.CRD0, 0x0)
}
}
}
OperationRegion(CCRD, PCI_Config, 0x0, 0xa7)
Field(CCRD, DWordAcc, Lock, Preserve) {
Offset(0x4),
TI04, 8,
Offset(0x44),
TI44, 16,
Offset(0x80),
PMEE, 1,
Offset(0x81),
Offset(0xa4),
PWST, 2,
Offset(0xa5),
, 7,
PMST, 1
}
OperationRegion(TIIO, SystemIO, 0x03e0, 0x2)
Field(TIIO, ByteAcc, NoLock, Preserve) {
TIID, 8,
TIDA, 8
}
}
Device(NICD) {
Name(_ADR, 0x000b0000)
Name(_PRW, Package(0x2) {
0x9,
0x3,
})
}
Device(USB1) {
Name(_ADR, 0x00020000)
Scope(\_GPE) {
Name(GPEF, 0x0)
Method(_L0B) {
Notify(\_SB_.PCI0.USB1, 0x2)
Store(0x0, GPEF)
}
}
}
Device(USB2) {
Name(_ADR, 0x000f0000)
Scope(\_GPE) {
Method(_L0D) {
Notify(\_SB_.PCI0.USB2, 0x2)
Store(0x0, GPEF)
}
}
}
Device(MODM) {
Name(_ADR, 0x000c0000)
Name(_PRW, Package(0x2) {
0x9,
0x3,
})
}
}
Device(AC__) {
Name(_HID, "ACPI0003")
Name(_PCL, Package(0x1) {
\_SB_,
})
Name(ACP_, 0x0)
Method(_STA) {
Store("---------------------------- AC _STA", Debug)
Return(0xf)
}
Method(_PSR) {
Store("---------------------------- AC _PSR", Debug)
Store(ACP_, Local0)
Store(0x8c, \_SB_.PCI0.ISA_.BCMD)
Store(Zero, \_SB_.PCI0.ISA_.SMIC)
Store(\_SB_.PCI0.ADP_, Local0)
If(LNot(LEqual(Local0, ACP_))) {
FLPA()
}
If(Local0) {
Store("---------------------------- AC on line", Debug)
}
Else {
Store("---------------------------- AC off line", Debug)
}
Return(Local0)
}
Method(CHAC) {
Store("---------------------------- AC _CHAC", Debug)
If(\_SB_.PCI0.ISA_.EC__.ECOK) {
Acquire(\_SB_.PCI0.ISA_.EC__.MTX0, 0xffff)
Store(\_SB_.PCI0.ISA_.EC__.ADP_, Local0)
Release(\_SB_.PCI0.ISA_.EC__.MTX0)
If(LNot(LEqual(Local0, ACP_))) {
FLPA()
}
}
}
Method(FLPA) {
Store("---------------------------- AC _FLPA", Debug)
If(ACP_) {
Store(0x0, ACP_)
}
Else {
Store(0x1, ACP_)
}
Notify(\_SB_.AC__, 0x0)
}
}
Device(BAT0) {
Name(_HID, 0x0a0cd041)
Name(_UID, 0x1)
Name(_PCL, Package(0x1) {
\_SB_,
})
Name(BIFB, Package(0xd) {
0x1,
0x0514,
0x0514,
0x1,
0x2a30,
0x0138,
0x9c,
0xd,
0xd,
"CA54200",
"1",
" ",
" COMPAQ ",
})
Name(BSTB, Package(0x4) {
0x0,
0xffffffff,
0xffffffff,
0x2710,
})
Name(MDLS, Package(0x7) {
"Unknown",
" 3500",
" 3800",
" 4500",
" 2600",
" 3000",
" 3200",
})
Name(CHAR, Package(0x10) {
"0",
"1",
"2",
"3",
"4",
"5",
"6",
"7",
"8",
"9",
"A",
"B",
"C",
"D",
"E",
"F",
})
Method(PBFE, 3) {
CreateByteField(Arg0, Arg1, TIDX)
Store(Arg2, TIDX)
}
Method(ITOS, 1) {
Store("", Local0)
Store(0x8, Local1)
While(Local1) {
Decrement(Local1)
And(ShiftRight(Arg0, ShiftLeft(Local1, 0x2, ), ), 0xf, Local4)
Store(DerefOf(Index(CHAR, Local4, )), Local2)
Concatenate(Local0, Local2, Local5)
Store(Local5, Local0)
}
Return(Local0)
}
Method(Z002, 1) {
Store("", Local0)
Store(0x4, Local1)
While(Local1) {
Decrement(Local1)
And(ShiftRight(Arg0, ShiftLeft(Local1, 0x2, ), ), 0xf, Local4)
Store(DerefOf(Index(CHAR, Local4, )), Local2)
Concatenate(Local0, Local2, Local5)
Store(Local5, Local0)
}
Return(Local0)
}
Method(_STA) {
Store(0x8b, \_SB_.PCI0.ISA_.BCMD)
Store(Zero, \_SB_.PCI0.ISA_.SMIC)
Store(\_SB_.PCI0.BATP, Local0)
If(Or(Local0, Local0, )) {
Return(0x1f)
}
Else {
Return(0xf)
}
}
Method(_BIF) {
Store(0x8b, \_SB_.PCI0.ISA_.BCMD)
Store(Zero, \_SB_.PCI0.ISA_.SMIC)
Acquire(\_SB_.PCI0.ISA_.EC__.MTX0, 0xffff)
Store(0x0, Index(BIFB, 0x0, ))
Store(\_SB_.PCI0.BDV_, Local1)
Store(\_SB_.PCI0.BDC_, Local0)
Multiply(Local0, Local1, Local0)
Divide(Local0, 0x03e8, Local2, Local0)
Store(Local0, Index(BIFB, 0x1, ))
Store(\_SB_.PCI0.BFC_, Local0)
Multiply(Local0, Local1, Local0)
Divide(Local0, 0x03e8, Local2, Local0)
Store(Local0, Index(BIFB, 0x2, ))
Store(\_SB_.PCI0.BTC_, Index(BIFB, 0x3, ))
Store(\_SB_.PCI0.BDV_, Index(BIFB, 0x4, ))
Store(\_SB_.PCI0.BCW_, Local0)
Multiply(Local0, Local1, Local0)
Divide(Local0, 0x03e8, Local2, Local0)
Store(Local0, Index(BIFB, 0x5, ))
Store(\_SB_.PCI0.BCL_, Local0)
Multiply(Local0, Local1, Local0)
Divide(Local0, 0x03e8, Local2, Local0)
Store(Local0, Index(BIFB, 0x6, ))
Store(\_SB_.PCI0.BCG_, Local0)
Multiply(Local0, Local1, Local0)
Divide(Local0, 0x03e8, Local2, Local0)
Store(Local0, Index(BIFB, 0x7, ))
Store(\_SB_.PCI0.BG2_, Local0)
Multiply(Local0, Local1, Local0)
Divide(Local0, 0x03e8, Local2, Local0)
Store(Local0, Index(BIFB, 0x8, ))
Store(\_SB_.PCI0.BMO_, Local5)
Store(\_SB_.PCI0.NABT, Local5)
And(Local5, 0xf, Local5)
If(LGreater(Local5, 0x6)) {
Store(DerefOf(Index(MDLS, 0x0, )), Index(BIFB, 0x9, ))
}
Else {
Store("---------------- NABT < 6 ", Debug)
Store(\_SB_.PCI0.NABT, Local5)
And(Local5, 0xf, Local5)
Store(0x0, Local1)
If(LEqual(Local5, 0x1)) {
Store(0x1, Local1)
}
If(LEqual(Local5, 0x4)) {
Store(0x1, Local1)
}
Store(\_SB_.PCI0.BDC_, Local0)
If(LEqual(Local1, 0x1)) {
Store("---------------------NiMH battery, NABT =1,4 ", Debug)
If(LNot(LLess(Local0, 0x0ed8))) {
Store(Z002(ToBCD(Local0, )), Local1)
Store(Local1, Index(BIFB, 0x9, ))
Store("-------------------- DC > 3800 ", Debug)
}
Else {
Store("3800", Index(BIFB, 0x9, ))
Store("-------------------- DC <= 3800 ", Debug)
}
Store(\_SB_.PCI0.BDC_, Local0)
If(LEqual(Local0, 0x11c6)) {
Store("3800", Index(BIFB, 0x9, ))
Store("-------------------- DC =4550 ", Debug)
}
}
Else {
Store("---------------- Li Battery ", Debug)
If(LNot(LLess(Local0, 0x0bb8))) {
Store(Z002(ToBCD(Local0, )), Local1)
Store(Local1, Index(BIFB, 0x9, ))
Store("--------------------- DC >= 3000 ", Debug)
}
Else {
Store("2600", Index(BIFB, 0x9, ))
Store("--------------------- DC < 3000 ", Debug)
}
}
}
Store(\_SB_.PCI0.BSN0, Local0)
Store(\_SB_.PCI0.BSN1, Local1)
Store(\_SB_.PCI0.BTY0, Local0)
Store(\_SB_.PCI0.BTY1, Local1)
Store(\_SB_.PCI0.BTY2, Local2)
Store(\_SB_.PCI0.BTY3, Local3)
Store(Buffer(0x5) { }, Local4)
PBFE(Local4, 0x0, Local0)
PBFE(Local4, 0x1, Local1)
PBFE(Local4, 0x2, Local2)
PBFE(Local4, 0x3, Local3)
PBFE(Local4, 0x4, 0x0)
Name(Z003, "xxxxxxxx")
Store(Local4, Z003)
Store(Z003, Index(BIFB, 0xb, ))
If(\_SB_.PCI0.BATP) {
Store(" COMPAQ ", Index(BIFB, 0xc, ))
}
Else {
Store(" ", Index(BIFB, 0xc, ))
}
Release(\_SB_.PCI0.ISA_.EC__.MTX0)
Return(BIFB)
}
Method(_BST) {
UBST()
Return(BSTB)
}
Name(CRIT, 0x0)
Method(UBST) {
Store(0x8c, \_SB_.PCI0.ISA_.BCMD)
Store(Zero, \_SB_.PCI0.ISA_.SMIC)
Store(\_SB_.PCI0.BST_, Index(BSTB, 0x0, ))
Store(\_SB_.PCI0.BPR_, Local0)
Store(\_SB_.PCI0.BDV_, Local1)
If(LNot(LLess(Local0, 0x8000))) {
Subtract(0x00010000, Local0, Local0)
Multiply(Local0, Local1, Local0)
Divide(Local0, 0x03e8, Local2, Local0)
Store(Local0, Index(BSTB, 0x1, ))
}
Else {
Multiply(Local0, Local1, Local0)
Divide(Local0, 0x03e8, Local2, Local0)
Store(Local0, Index(BSTB, 0x1, ))
}
Store(\_SB_.PCI0.BRC_, Local0)
Multiply(Local0, Local1, Local0)
Divide(Local0, 0x03e8, Local2, Local0)
Store(Local0, Index(BSTB, 0x2, ))
Store(\_SB_.PCI0.BPV_, Index(BSTB, 0x3, ))
Store(DerefOf(Index(BSTB, 0x0, )), Local0)
If(\_SB_.PCI0.ISA_.EC__.ECOK) {
Store(\_SB_.PCI0.ISA_.EC__.BATC, Local1)
}
And(Local0, 0xfffb, Local0)
ShiftLeft(Local1, 0x2, Local1)
Add(Local0, Local1, Local0)
Store(Local0, Index(BSTB, 0x0, ))
}
Method(Z001) {
Acquire(\_SB_.PCI0.ISA_.EC__.MTX1, 0xffff)
If(LEqual(_STA(), 0x1f)) {
UBST()
_BIF()
Notify(\_SB_.AC__, 0x0)
Notify(\_SB_.BAT0, 0x0)
Notify(\_SB_.BAT0, 0x80)
Notify(\_SB_.BAT0, 0x81)
}
Else {
UBST()
Notify(\_SB_.AC__, 0x0)
Notify(\_SB_.BAT0, 0x0)
Notify(\_SB_.BAT0, 0x80)
Notify(\_SB_.BAT0, 0x81)
}
\_SB_.AC__.FLPA()
Release(\_SB_.PCI0.ISA_.EC__.MTX1)
}
}
}
Name(TPL_, 0x0cfa)
Scope(\_TZ_) {
ThermalZone(THRM) {
Name(Z004, 0x0)
Method(_TMP) {
Store(0x8d, \_SB_.PCI0.ISA_.BCMD)
Store(Zero, \_SB_.PCI0.ISA_.SMIC)
Store(" ----------------- THRM_TMP -----------------", Debug)
If(\_SB_.PCI0.ISA_.EC__.ECOK) {
If(\_SB_.PCI0.BATC) {
Notify(\_SB_.BAT0, 0x80)
}
Acquire(\_SB_.PCI0.ISA_.EC__.MTX0, 0xffff)
Store(\_SB_.PCI0.TMP_, Local0)
Release(\_SB_.PCI0.ISA_.EC__.MTX0)
Multiply(Local0, 0xa, Local1)
Add(Local1, 0x0aac, Local0)
If(LGreater(Local0, 0x0aac)) {
Return(Local0)
}
Else {
Return(TPL_)
}
}
Else {
Return(TPL_)
}
}
Name(_PSL, Package(0x1) {
\_PR_.CPU0,
})
Name(_PSV, 0x0e80)
Name(_CRT, 0x0e94)
Name(_TC1, 0x0)
Name(_TC2, 0x1)
Name(_TSP, 0x96)
Method(_SCP, 1) {
Store(Arg0, Z004)
}
}
}
Scope(_GPE) {
}
}
/*
SSDT: Length=313, Revision=1, Checksum=223,
OEMID=PTLTD, OEM Table ID=POWERNOW, OEM Revision=0x6040000,
Creator ID= LTP, Creator Revision=0x1
*/
>Description:
Booting system with ACPI enabled causes absence of psm(4) device:
psm0: unable to allocate IRQ
Without ACPI, psm works properly.
>How-To-Repeat:
Boot system with ACPI enabled on Evo N1015v.
>Fix:
Disable ACPI.
>Release-Note:
>Audit-Trail:
>Unformatted:
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