Date: Sun, 17 Feb 2008 11:58:52 +0200 From: Andriy Gapon <avg@icyb.net.ua> To: freebsd-hackers@freebsd.org Subject: Re: cpu stats and another interrupt question Message-ID: <47B8055C.4060305@icyb.net.ua> In-Reply-To: <47B4A514.1020103@icyb.net.ua> References: <47B4A514.1020103@icyb.net.ua>
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Come on, guys, simple yes or no would be enough for me :-) on 14/02/2008 22:31 Andriy Gapon said the following: > Dear hackers, > I'd like to check with you if my understanding of some code is correct. > > If we speak about a typical older i386 system, with UP and "AT" PIC, I > think this is how the CPU utilization stats are collected. > RTC is configured to generate interrupts (IRQ8) 128 times per second. > Each time interrupt is generated RTC interrupt handler (I will use > simple non technical terms) takes a peek at what was interrupted and > depending on the properties of that thing (kernel thread) bills a tick > to particular category. E.g. if it sees that the "idle" thread is > interrupted then a tick is billed to "idle", if an interrupt thread is > interrupted (software or hardware) then a tick is billed to interrupt, > if a thread is running user-mode code then a tick is billed to "user" or > "nice", otherwise it's "system". > I understand that I oversimplify, but is the above correct in general ? > > Another, unrelated, question. > Considering this snippet from sys/i386/isa/atpic.c, i8259_init(): > #ifndef PC98 > /* OCW2_L1 sets priority order to 3-7, 0-2 (com2 first). */ > if (!slave) > outb(pic->at_ioaddr, OCW2_R | OCW2_SL | OCW2_L1); > #endif > > Do I understand correctly the code and the comment that here we use a > feature of 8259 PIC that can be called "cyclic shift of interrupt > priorities" ? > So, we really have the following order of interrupts, from higher > priority to lower: 3-7,0,1,8-15? Considering two chained 8259s, of course. > -- Andriy Gapon
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