Date: Wed, 01 Aug 2012 12:32:44 -0600 From: Ian Lepore <freebsd@damnhippie.dyndns.org> To: Dave Hayes <dave@jetcafe.org> Cc: freebsd-arm@freebsd.org Subject: Re: Globalscale Dreamplug and 8.3 RELEASE Message-ID: <1343845964.1128.28.camel@revolution.hippie.lan> In-Reply-To: <5008728C.5040100@jetcafe.org> References: <5008728C.5040100@jetcafe.org>
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--=-/83oDyvDRjrBuKR4E5GQ Content-Type: text/plain; charset="us-ascii" Content-Transfer-Encoding: 7bit On Thu, 2012-07-19 at 13:48 -0700, Dave Hayes wrote: > Hello. :) I'm using FreeBSD 8.3 RELEASE and attempting to get this > running on my dreamplug. I've successfully gotten it to boot off of a > usb stick (after many adventures) but I've run into a problem. It seems > that mge1 is not found (the 2nd ethernet interface). > > I really need this to work, so I did some digging on this list but it > seems there's a .dts file needed. FreeBSD 8 doesn't use dts files as far > as I can tell, though I could be horribly wrong there. > > Can anyone point me to some patches which would get the 2nd ethernet > interface to work? I finally found some time yesterday to play around with this (sorry to take so long to respond). I made some small progress towards getting the second ethernet interface working, but didn't achieve complete success. The attached patch (for freebsd 8) gets things to the point where the mge1 device is created at boot time. You can manually configure the interface and packets will be received, but no packets ever go out. I did some driver debugging to the point where I see the outgoing packet buffers being handed to the hardware, and then shortly thereafter TX-done interrupts happen, as if the packet was sent just fine. But either the bits never hit the wire, or the packets are malformed in some way such that other boxes on my network can't see them arrive (using tcpdump; I don't have any wire-level debugging tools). I get the same results with a freshly-sync'd -current, so this isn't specific to freebsd 8. I have a feeling there's some simple little thing I'm overlooking because I don't know the arm/mv code well. Like the PHY needs to be powered on or a clock enabled for it or something like that. I don't think I've got much more time to play with this right now, so I figured I should post what I've learned along with the patches that get it this far; maybe someone else can make some more progress. -- Ian --=-/83oDyvDRjrBuKR4E5GQ Content-Disposition: attachment; filename="dreamplug_8_mge1.diff" Content-Type: text/x-patch; name="dreamplug_8_mge1.diff"; charset="us-ascii" Content-Transfer-Encoding: 7bit Index: sys/arm/mv/kirkwood/kirkwood.c =================================================================== --- sys/arm/mv/kirkwood/kirkwood.c (revision 234710) +++ sys/arm/mv/kirkwood/kirkwood.c (working copy) @@ -95,6 +95,12 @@ { -1 }, CPU_PM_CTRL_GE0 }, + { "mge", MV_ETH1_BASE, MV_ETH_SIZE, + { MV_INT_GBE1RX, MV_INT_GBE1TX, MV_INT_GBE1MISC, + MV_INT_GBE1SUM, MV_INT_GBE1ERR, -1 }, + { -1 }, + CPU_PM_CTRL_GE1 + }, { "twsi", MV_TWSI0_BASE, MV_TWSI_SIZE, { -1 }, { -1 }, CPU_PM_CTRL_NONE Index: sys/arm/mv/common.c =================================================================== --- sys/arm/mv/common.c (revision 234710) +++ sys/arm/mv/common.c (working copy) @@ -307,7 +307,7 @@ decode_win_cpu_setup(); decode_win_usb_setup(); decode_win_eth_setup(MV_ETH0_BASE); - if (dev == MV_DEV_MV78100 || dev == MV_DEV_MV78100_Z0) + if (dev == MV_DEV_MV78100 || dev == MV_DEV_MV78100_Z0 || dev == MV_DEV_88F6281) decode_win_eth_setup(MV_ETH1_BASE); if (dev == MV_DEV_88F6281 || dev == MV_DEV_MV78100 || dev == MV_DEV_MV78100_Z0) Index: sys/dev/mge/if_mge.c =================================================================== --- sys/dev/mge/if_mge.c (revision 234710) +++ sys/dev/mge/if_mge.c (working copy) @@ -69,10 +69,6 @@ #include <dev/mii/mii.h> #include <dev/mii/miivar.h> -#ifndef MII_ADDR_BASE -#define MII_ADDR_BASE 8 -#endif - #include <dev/mge/if_mgevar.h> #include <arm/mv/mvreg.h> #include <arm/mv/mvvar.h> @@ -619,13 +615,6 @@ /* Set chip version-dependent parameters */ mge_ver_params(sc); - /* - * We assume static PHY address <=> device unit mapping: - * PHY Address = MII_ADDR_BASE + devce unit. - * This is true for most Marvell boards. - */ - phy = MII_ADDR_BASE + device_get_unit(dev); - /* Initialize mutexes */ mtx_init(&sc->transmit_lock, device_get_nameunit(dev), "mge TX lock", MTX_DEF); mtx_init(&sc->receive_lock, device_get_nameunit(dev), "mge RX lock", MTX_DEF); @@ -687,13 +676,15 @@ ether_ifattach(ifp, hwaddr); callout_init(&sc->wd_callout, 0); - /* Attach PHY(s) */ + /* Attach PHY. We assume static PHY address <=> device unit mapping: + * PHY Address = MGE_REG_PHYDEV + device unit. This is true for most + * Marvell boards. + */ + phy = (MGE_READ(sc_mge0, MGE_REG_PHYDEV) & 0xf) + device_get_unit(dev); error = mii_attach(dev, &sc->miibus, ifp, mge_ifmedia_upd, mge_ifmedia_sts, BMSR_DEFCAPMASK, phy, MII_OFFSET_ANY, 0); if (error) { device_printf(dev, "attaching PHYs failed\n"); - if_free(ifp); - sc->ifp = NULL; mge_detach(dev); return (error); } @@ -742,6 +733,7 @@ if (sc->ifp) { ether_ifdetach(sc->ifp); if_free(sc->ifp); + sc->ifp = NULL; } /* Free DMA resources */ --=-/83oDyvDRjrBuKR4E5GQ--
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