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Date:      Fri, 9 Sep 2011 04:40:20 +0000 (UTC)
From:      Adrian Chadd <adrian@FreeBSD.org>
To:        src-committers@freebsd.org, svn-src-user@freebsd.org
Subject:   svn commit: r225455 - user/adrian/if_ath_tx/sys/dev/ath/ath_hal/ar5416
Message-ID:  <201109090440.p894eKhw021668@svn.freebsd.org>

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Author: adrian
Date: Fri Sep  9 04:40:20 2011
New Revision: 225455
URL: http://svn.freebsd.org/changeset/base/225455

Log:
  I've been seeing situations where the TX queue has validly completed
  packets in it. This shouldn't occur - the hardware should've sent an
  interrupt to signal that a TX completion had occured.
  
  So on a hunch, I decided to shuffle the interrupt mitigation bits
  up a bit, because I figured that the hardware may be sending a
  TX mitigation interrupt but not asserting TXOK at the time.
  
  This seems to be doing the "right" thing - ie, at the time the
  mitigation timer expiry has occured, the AR_ISR_S0/AR_ISR_S1/AR_ISR_S2
  registers seem to have the correct TX queue interrupt cause bits set;
  as they would stay set (once set) until AR_ISR_RAC is read.
  
  I'm going to have to chase this up with the MAC guys at Atheros to see
  exactly what the correct behaviour is.
  
  (Now there are still device timeout messages, but with an empty TX
   queue- this signifies a different problem.)

Modified:
  user/adrian/if_ath_tx/sys/dev/ath/ath_hal/ar5416/ar5416_interrupts.c

Modified: user/adrian/if_ath_tx/sys/dev/ath/ath_hal/ar5416/ar5416_interrupts.c
==============================================================================
--- user/adrian/if_ath_tx/sys/dev/ath/ath_hal/ar5416/ar5416_interrupts.c	Fri Sep  9 01:39:19 2011	(r225454)
+++ user/adrian/if_ath_tx/sys/dev/ath/ath_hal/ar5416/ar5416_interrupts.c	Fri Sep  9 04:40:20 2011	(r225455)
@@ -118,10 +118,21 @@ ar5416GetPendingInterrupts(struct ath_ha
 			return AH_FALSE;
 		}
 
+		/*
+		 * XXX TODO: see whether the hardware signals AR_ISR_RXOK
+		 * even if RX interrupt mitigation is enabled (but then
+		 * doesn't trigger an interrupt per RX packet) - which means
+		 * we'll be setting HAL_INT_RX even before the RX mitigation
+		 * timers have expired.
+		 *
+		 * XXX TODO: do the same for the TX interrupts and TX interrupt
+		 * mitigation.
+		 */
+
 		*masked = isr & HAL_INT_COMMON;
-		if (isr & (AR_ISR_RXOK | AR_ISR_RXERR))
+		if (isr & (AR_ISR_RXOK | AR_ISR_RXERR | AR_ISR_RXMINTR | AR_ISR_RXINTM))
 			*masked |= HAL_INT_RX;
-		if (isr & (AR_ISR_TXOK | AR_ISR_TXDESC | AR_ISR_TXERR | AR_ISR_TXEOL)) {
+		if (isr & (AR_ISR_TXOK | AR_ISR_TXDESC | AR_ISR_TXERR | AR_ISR_TXEOL | AR_ISR_TXMINTR | AR_ISR_TXINTM)) {
 			*masked |= HAL_INT_TX;
 			isr0 = OS_REG_READ(ah, AR_ISR_S0_S);
 			ahp->ah_intrTxqs |= MS(isr0, AR_ISR_S0_QCU_TXOK);
@@ -138,13 +149,6 @@ ar5416GetPendingInterrupts(struct ath_ha
 				*masked |= HAL_INT_TIM_TIMER;
 		}
 
-		/* Interrupt Mitigation on AR5416 */
-#ifdef	AH_AR5416_INTERRUPT_MITIGATION
-		if (isr & (AR_ISR_RXMINTR | AR_ISR_RXINTM))
-			*masked |= HAL_INT_RX;
-		if (isr & (AR_ISR_TXMINTR | AR_ISR_TXINTM))
-			*masked |= HAL_INT_TX;
-#endif
 		*masked |= mask2;
 	}
 



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