Date: Sun, 23 Dec 2001 15:09:29 +1100 (EST) From: Bruce Evans <bde@zeta.org.au> To: Matthew Dillon <dillon@apollo.backplane.com> Cc: Mike Silbersack <silby@silby.com>, <cvs-committers@FreeBSD.ORG>, <cvs-all@FreeBSD.ORG> Subject: Re: cvs commit: src/sys/dev/sio sio.c Message-ID: <20011223144211.W10469-100000@gamplex.bde.org> In-Reply-To: <200112230322.fBN3MXd99405@apollo.backplane.com>
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On Sat, 22 Dec 2001, Matthew Dillon wrote: > :More frequent interrupts mainly hide interrupt latency problems. If > :something breaks interrupt latency, then there is nothing to prevent > :it from being broken by twice as much. > : > :Note that there is a problem if you have more than about 8 active sio > :devices or similar devices on other drivers that use fast interrupt > :handlers (currently, the cy serial driver is the only other driver > :with non-broken fast interrupt handlers). The devices will get in > :each others way. > : > :The driver used to have dynamic fifo trigger reduction, mainly to > :support many active sio devices, but this was found harmful and backed > :out: > > And if you have 16 ports? 32 ports? The vast majority of people It won't work. The i/o alone for 16 ports at 115200 bps bidirectional is a little more than 552960 inb() instructions per second. > using FreeBSD either have 1-4 ports, or they have smart multi-serial > cards that provide aggregation of some sort. Anybody trying to take 8 > discrete 16550 serial interrupt sources is just asking for it no > matter *what* the FIFO levels are set to. Set the FIFO levels too That's one reason why the old default setting is correct. The default just works for most people unless interrupt latency is broken. > high and you have random (though possibly less freqyent) silo overflows. > Set the FIFO levels too low and you have an interrupt storm. You can't > win with discrete interrupt sources no matter how you flip the coin. > > I don't think FIFO trigger levels set for multi-discrete serial > interrupts on machines made in 1994 have any bearing on the problem > we face today. It worked with 1994's hardware so it should work today with the same serial hardware. Most users' serial hardware is the same or even less demanding today than it was in 1994. 1-2 16550's on an ASIC is standard today. Back in 1994 (or was it 1992?), 1-2 discrete 16450's was standard and you had to get another i/o card with 16550's if you wanted any buffering at all. > In fact, if you wanted to support that type of discrete scheme it > would be far better to poll once every 500 uS or so and not set FIFO > triggers at all. That would probably be sufficient to avoid all silo > errors on any machine made all the way back to 1990 or so. Except the polling routine would have to run as a fast interrupt handler and be guaranteed to run every 500 usec or so. Guaranteeing this is almost as hard as guaranteeing that the sio fast interrupt handler runs within about 80 usec of an sio interrupt occurring (so that the driver has time to start up before the 87 usec latency requirement for 115200 bps expires). Actually, the latency requirement should be 8 times lower today, to support 921600 bps. That is a bit too much to ask for, and only 4 times lower is required with FIFO_RX_HIGH. Your FIFO_RX_MEDHI is probably at 921600 required to reduce the latency requirement back to where it was in 1992 for 115200 bps on 8250's. Bruce To Unsubscribe: send mail to majordomo@FreeBSD.org with "unsubscribe cvs-all" in the body of the message
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