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Date:      Fri, 03 Apr 2015 13:20:20 -0400
From:      John Baldwin <jhb@freebsd.org>
To:        Konstantin Belousov <kostikbel@gmail.com>
Cc:        svn-src-head@freebsd.org, svn-src-all@freebsd.org, src-committers@freebsd.org
Subject:   Re: svn commit: r280866 - in head/sys: amd64/amd64 i386/i386
Message-ID:  <3872682.8P88THCPIf@ralph.baldwin.cx>
In-Reply-To: <20150331183856.GT2379@kib.kiev.ua>
References:  <201503302013.t2UKDNCo093442@svn.freebsd.org> <3149031.gmIvmB3vKt@ralph.baldwin.cx> <20150331183856.GT2379@kib.kiev.ua>

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On Tuesday, March 31, 2015 09:38:56 PM Konstantin Belousov wrote:
> On Tue, Mar 31, 2015 at 12:51:04PM -0400, John Baldwin wrote:
> > I don't really know if we need to increase the delays or not.  I have no idea
> > what Intel's source for those numbers in the two documents are.  I don't think
> > I've ever seen a rationale for why they were chosen.
> It might beia time to run BIST + some sloppiness for the actual initialization
> code.  Intel claims
> 
> 9.1.2 Processor Built-In Self-Test (BIST)
> 
> The overhead for performing a BIST varies between processor families.
> For example, the BIST takes approximately 30 million processor clock
> periods to execute on the Pentium 4 processor. This clock count is
> model-specific; Intel reserves the right to change the number of periods
> for any Intel 64 or IA-32 processor, without notification.

Interesting.

> > 
> > BTW, Linux seems to use the equivalent of 100 milliseconds for the
> > lapic_ipi_wait() stage before doing the other delays (see
> > native_safe_apic_wait_icr_idle() for the non-X2APIC case).
> 
> My main observation is that we allow almost twice as much time for AP
> to start in the xAPIC mode vs. x2APIC.  But increasing the delays did
> not helped the machines where it fails.

I don't know that it's really twice.  For INIT x2APIC waits 10000 us
while the xAPIC case has gone from 10020 us to 10100 us.  For the STARTUP
it is a bit closer in that x2APIC is 200 us while xAPIC has gone from
220 us to 300 us.  Granted, the xAPIC wait is actually variable and can
be as small as the x2APIC wait of the pending bit clears immediately.

-- 
John Baldwin



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