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Date:      Mon, 6 Dec 1999 11:10:33 -0600
From:      kvandel <kvandel@cs.duke.edu>
To:        Mike Smith <msmith@freebsd.org>
Cc:        freebsd-hackers@freebsd.org
Subject:   Re: fxp, xl driver question .. (routing)(SOLVED)
Message-ID:  <99120611312500.00860@wookie.vandelden.com>
In-Reply-To: <199912060813.AAA01499@mass.cdrom.com>
References:  <199912060813.AAA01499@mass.cdrom.com>

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Mike-

> I should have summarised this by saying:  Correct use of the latency 
> timer will shorten your DMA bursts for you when necessary, giving you the 
> best of both worlds.  When it's safe to run a long burst, you will.  When 
> you need to push a device off the bus, that will happen too.
After re-reading the PCI System Architecture section.. you are correct.

The Text:
If the current master has exhausted its LT, still has its GNT# and has not yet
completed its burst transfer, it may retain ownership of the bus and continue
to burst data until either:
  a. it completes its overall burst transfer
  b. its GNT# is removed by the arbiter

In the latter case, the current master is permitted to complete one or more data
transfer and must then yield the bus.

My misunderstanding:
From the wording in the text, it is ambiguous as whether the a "data transfer" 
is a frame(one adress cycle + multiple data cycles), or a data cycle.  

> And the obvious extension to the "worst case" calculation is that if you 
> have N master devices each with a latency timer of X, your worst-case 
> timing for CPU access to a device is (N * X) + (N * arb overhead), just 
> in case that wasn't clear.
Much better...

thanks,
kurt
> 
> -- 
> \\ Give a man a fish, and you feed him for a day. \\  Mike Smith
> \\ Tell him he should learn how to fish himself,  \\  msmith@freebsd.org
> \\ and he'll hate you for a lifetime.             \\  msmith@cdrom.com
-- 

uname -a > Linux wookie.vandelden.com 2.2.13 #1 <


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