Date: Sun, 15 Dec 1996 08:54:05 -0500 From: "Louis A. Mamakos" <louie@TransSys.COM> To: Amancio Hasty <hasty@rah.star-gate.com> Cc: hackers@freebsd.org Subject: Re: PCI 2.1 Byte Enables? Message-ID: <199612151354.IAA11420@whizzo.transsys.com> In-Reply-To: Your message of "Sat, 14 Dec 1996 23:20:08 PST." <199612150720.XAA00409@rah.star-gate.com> References: <199612150720.XAA00409@rah.star-gate.com>
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The 4 bit PCI byte enables probably maps to the C/BE#[3:0] "Command or Byte Enable bus", which is used to define the type of transaction and which which PCI data paths are used. C/BE3# - Data path 3, AD[31:24], and the fourth location in the currently addressed doubleword. C/BE2# - Data path 2, AD[23:16], and the third location in the currently addressed doubleword. C/BE3# - Data path 1, AD[15:8], and the second location in the currently addressed doubleword. C/BE3# - Data path 0, AD[7:0], and the first location in the currently addressed doubleword. During the data phase, the signals are interpreted as such: C/BE3# C/BE2# C/BE1# C/BE0# ------ ------ ------ ------ 0 0 0 0 The initiator intend to transfer all four byte within the currently addresed doubleword using all four data paths 0 0 0 1 The initiator intends to transfer the upper three bytes within the currently addressed doubleword using the upper three data paths 0 0 1 0 The initiator intends to transfer the upper two bytes and the first byte wintin the currently addressed doubleword using the upper two data paths and the first data path. 0 0 1 1 The initiator intends to transfer the upper two bytes within the currently addressed doubleword using the upper two data paths 0 1 0 0 The initiator intends to transfer the upper byte and the lower two bytes within the currently addressed doubleword using the upper datapath and the lower two data paths. etc. If your interested in a pretty good treatment of the PCI bus, I'd recommend "PCI System Architecture", by Tom Shanley and Don Anderson of MindShare, Inc. Published by Addison Wesley, ISBN 0-201-40993-3. It covers in pretty good detail all the aspects of the PCI bus, including the autoconfiguration registers and other software issues. louie
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