Date: Fri, 12 Nov 2010 20:26:34 +0000 (UTC) From: Nathan Whitehorn <nwhitehorn@FreeBSD.org> To: src-committers@freebsd.org, svn-src-all@freebsd.org, svn-src-head@freebsd.org Subject: svn commit: r215197 - head/sys/powerpc/aim Message-ID: <201011122026.oACKQYwf022373@svn.freebsd.org>
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Author: nwhitehorn Date: Fri Nov 12 20:26:34 2010 New Revision: 215197 URL: http://svn.freebsd.org/changeset/base/215197 Log: Partially revert r215182. There appears to be a silicon bug on the 970 that causes AP bringup to fail if some of the Cell HID-register code is anywhere in the instruction stream. Pending a better solution, cache performance on SMP Cell systems running without a hypervisor will be suboptimal. Modified: head/sys/powerpc/aim/mp_cpudep.c Modified: head/sys/powerpc/aim/mp_cpudep.c ============================================================================== --- head/sys/powerpc/aim/mp_cpudep.c Fri Nov 12 20:01:53 2010 (r215196) +++ head/sys/powerpc/aim/mp_cpudep.c Fri Nov 12 20:26:34 2010 (r215197) @@ -228,8 +228,8 @@ cpudep_save_config(void *dummy) powerpc_sync(); break; -#ifdef __powerpc64__ case IBMCELLBE: + #ifdef NOTYET /* Causes problems if in instruction stream on 970 */ if (mfmsr() & PSL_HV) { bsp_state[0] = mfspr(SPR_HID0); bsp_state[1] = mfspr(SPR_HID1); @@ -238,11 +238,11 @@ cpudep_save_config(void *dummy) bsp_state[4] = mfspr(SPR_CELL_TSCR); } + #endif bsp_state[5] = mfspr(SPR_CELL_TSRL); break; -#endif case MPC7450: case MPC7455: case MPC7457: @@ -303,8 +303,8 @@ cpudep_ap_setup() powerpc_sync(); break; -#ifdef __powerpc64__ case IBMCELLBE: + #ifdef NOTYET /* Causes problems if in instruction stream on 970 */ if (mfmsr() & PSL_HV) { mtspr(SPR_HID0, bsp_state[0]); mtspr(SPR_HID1, bsp_state[1]); @@ -313,11 +313,11 @@ cpudep_ap_setup() mtspr(SPR_CELL_TSCR, bsp_state[4]); } + #endif mtspr(SPR_CELL_TSRL, bsp_state[5]); break; -#endif case MPC7450: case MPC7455: case MPC7457:
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