Date: Sun, 9 Nov 2003 20:11:47 -0800 (PST) From: Juli Mallett <jmallett@FreeBSD.org> To: Perforce Change Reviews <perforce@freebsd.org> Subject: PERFORCE change 41864 for review Message-ID: <200311100411.hAA4Bl3n068351@repoman.freebsd.org>
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http://perforce.freebsd.org/chv.cgi?CH=41864 Change 41864 by jmallett@jmallett_dalek on 2003/11/09 20:11:23 1) Damnation to whoever decided to omit binary notation from C. 2) Foolish me for 0x11 when I meant 0x03. 3) Macroify TLB EntryHi generation, XXX the macro names suck. 4) Make tlb_invalidate_page() DWIM. 5) Write CP0's Wired register a 1, soon there will be more wired mappings, once I get past weird, deterministic stuff I'm seeing, and I do software page tables at a fixed VA. Affected files ... .. //depot/projects/mips/sys/mips/include/pte.h#14 edit .. //depot/projects/mips/sys/mips/mips/tlb.c#14 edit Differences ... ==== //depot/projects/mips/sys/mips/include/pte.h#14 (text+ko) ==== @@ -70,13 +70,17 @@ #ifdef LOCORE #define MIPS_HI_R_USER (0x00 << MIPS_HI_R_SHIFT) #define MIPS_HI_R_SUPERVISOR (0x01 << MIPS_HI_R_SHIFT) -#define MIPS_HI_R_KERNEL (0x11 << MIPS_HI_R_SHIFT) +#define MIPS_HI_R_KERNEL (0x03 << MIPS_HI_R_SHIFT) #else #define MIPS_HI_R_USER (0x00UL << MIPS_HI_R_SHIFT) #define MIPS_HI_R_SUPERVISOR (0x01UL << MIPS_HI_R_SHIFT) -#define MIPS_HI_R_KERNEL (0x11UL << MIPS_HI_R_SHIFT) +#define MIPS_HI_R_KERNEL (0x03UL << MIPS_HI_R_SHIFT) #endif +#define MIPS_HI_R_MASK (MIPS_HI_R_USER | MIPS_HI_R_SUPERVISOR | MIPS_HI_R_KERNEL) +#define MIPS_HI_VA_R(va) ((va) & MIPS_HI_R_MASK) #define MIPS_HI_FILL_SHIFT 40 +#define MIPS_HI_FILL_MASK ((0x800000UL - 1) << MIPS_HI_FILL_SHIFT) +#define MIPS_HI_VA_FILL(va) ((((va) & (1ULL << 63)) != 0 ? MIPS_HI_FILL_MASK : 0)) #define MIPS_HI_VPN2_SHIFT 13 #ifdef LOCORE #define MIPS_HI_VPN2_BMASK 0xFFFFFFF @@ -85,6 +89,10 @@ #endif #define MIPS_HI_VPN2_MASK (MIPS_HI_VPN2_BMASK << MIPS_HI_VPN2_SHIFT) #define MIPS_HI_VA_TO_VPN2(va) ((va) & MIPS_HI_VPN2_MASK) +#define MIPS_HI_ENTRY(va, asid) ((MIPS_HI_VA_R((va))) /* Region. */ | \ + (MIPS_HI_VA_FILL((va))) /* Fill. */ | \ + (MIPS_HI_VA_TO_VPN2((va))) /* VPN2. */ | \ + ((asid))) /* * TLB flags managed in hardware: ==== //depot/projects/mips/sys/mips/mips/tlb.c#14 (text+ko) ==== @@ -93,6 +93,11 @@ */ mips_wr_entryhi(0); tlb_invalidate_all(); + + /* + * Just one wired TLB entry. + */ + mips_wr_wired(1); } void @@ -154,12 +159,7 @@ int i; va &= ~PAGE_MASK; - ehi = 0; - ehi |= (va & (1UL << 63 | 1UL << 62)); - if ((va & (1UL << 63)) != 0) - ehi |= (0x800000UL - 1) << 40; - ehi |= MIPS_HI_VA_TO_VPN2(va); - ehi |= /* asid */0; + ehi = MIPS_HI_ENTRY(va, /*asid*/0); mips_wr_entryhi(ehi); mips_tlbp(); i = mips_rd_index(); @@ -199,8 +199,18 @@ void tlb_invalidate_page(vm_offset_t va) { + u_long ehi; + int i; + va &= ~PAGE_MASK; - tlb_invalidate_all(); + ehi = MIPS_HI_ENTRY(va, /*asid*/0); + mips_wr_entryhi(ehi); + mips_tlbp(); + i = mips_rd_index(); + if (i < 0) + printf("%s: %#lx not in tlb\n", __func__, va); + else + tlb_invalidate_one(va); } void
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