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Date:      Wed, 11 Aug 2021 00:49:26 GMT
From:      Alexander Motin <mav@FreeBSD.org>
To:        src-committers@FreeBSD.org, dev-commits-src-all@FreeBSD.org, dev-commits-src-branches@FreeBSD.org
Subject:   git: 50c21bf33905 - stable/13 - Do not expose to scheduler caches of single CPU.
Message-ID:  <202108110049.17B0nQOx086559@gitrepo.freebsd.org>

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The branch stable/13 has been updated by mav:

URL: https://cgit.FreeBSD.org/src/commit/?id=50c21bf3390556920ba8d73c50292776ce58bdaf

commit 50c21bf3390556920ba8d73c50292776ce58bdaf
Author:     Alexander Motin <mav@FreeBSD.org>
AuthorDate: 2021-07-28 20:15:43 +0000
Commit:     Alexander Motin <mav@FreeBSD.org>
CommitDate: 2021-08-11 00:49:22 +0000

    Do not expose to scheduler caches of single CPU.
    
    Before this change my dual-Xeon(R) Gold 6242R always reported 3 levels
    or topology (root, package/L3 and core/L2).  But with SMT disabled
    core/L2 matches thread, so additional topology level only causes more
    traversal work.  With this change SMT case is reported same as before,
    while non-SMT is reported with only 2 much more simple levels.
    
    MFC after:      2 weeks
    
    (cherry picked from commit 5a49f1914178c5275105f2ab0d23a98118cd585f)
---
 sys/x86/x86/mp_x86.c | 6 ++++++
 1 file changed, 6 insertions(+)

diff --git a/sys/x86/x86/mp_x86.c b/sys/x86/x86/mp_x86.c
index 2dcdf923c467..f1c1e45e79b8 100644
--- a/sys/x86/x86/mp_x86.c
+++ b/sys/x86/x86/mp_x86.c
@@ -828,6 +828,12 @@ x86topo_add_sched_group(struct topo_node *root, struct cpu_group *cg_root)
 		node = topo_next_nonchild_node(root, node);
 	}
 
+	/*
+	 * We are not interested in nodes including only one CPU each.
+	 */
+	if (nchildren == root->cpu_count)
+		return;
+
 	cg_root->cg_child = smp_topo_alloc(nchildren);
 	cg_root->cg_children = nchildren;
 



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