Date: Sat, 28 Sep 2019 22:19:52 +0000 (UTC) From: Emmanuel Vadot <manu@FreeBSD.org> To: src-committers@freebsd.org, svn-src-all@freebsd.org, svn-src-head@freebsd.org Subject: svn commit: r352850 - head/sys/arm64/rockchip/clk Message-ID: <201909282219.x8SMJq6G015505@repo.freebsd.org>
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Author: manu Date: Sat Sep 28 22:19:52 2019 New Revision: 352850 URL: https://svnweb.freebsd.org/changeset/base/352850 Log: arm64: rockchip: Implement resets Module resets where not implemented when rockchip clocks were commited. Implement them. Since all resets registers are contiguous a driver only need to give the start offset and the number of resets. This avoid to have to declare every resets. Modified: head/sys/arm64/rockchip/clk/rk3328_cru.c head/sys/arm64/rockchip/clk/rk3399_cru.c head/sys/arm64/rockchip/clk/rk3399_pmucru.c head/sys/arm64/rockchip/clk/rk_cru.c head/sys/arm64/rockchip/clk/rk_cru.h Modified: head/sys/arm64/rockchip/clk/rk3328_cru.c ============================================================================== --- head/sys/arm64/rockchip/clk/rk3328_cru.c Sat Sep 28 22:17:26 2019 (r352849) +++ head/sys/arm64/rockchip/clk/rk3328_cru.c Sat Sep 28 22:19:52 2019 (r352850) @@ -1083,6 +1083,9 @@ rk3328_cru_attach(device_t dev) sc->clks = rk3328_clks; sc->nclks = nitems(rk3328_clks); + sc->reset_offset = 0x300; + sc->reset_num = 184; + return (rk_cru_attach(dev)); } Modified: head/sys/arm64/rockchip/clk/rk3399_cru.c ============================================================================== --- head/sys/arm64/rockchip/clk/rk3399_cru.c Sat Sep 28 22:17:26 2019 (r352849) +++ head/sys/arm64/rockchip/clk/rk3399_cru.c Sat Sep 28 22:19:52 2019 (r352850) @@ -1673,6 +1673,9 @@ rk3399_cru_attach(device_t dev) sc->clks = rk3399_clks; sc->nclks = nitems(rk3399_clks); + sc->reset_offset = 0x400; + sc->reset_num = 335; + return (rk_cru_attach(dev)); } Modified: head/sys/arm64/rockchip/clk/rk3399_pmucru.c ============================================================================== --- head/sys/arm64/rockchip/clk/rk3399_pmucru.c Sat Sep 28 22:17:26 2019 (r352849) +++ head/sys/arm64/rockchip/clk/rk3399_pmucru.c Sat Sep 28 22:19:52 2019 (r352850) @@ -846,6 +846,9 @@ rk3399_pmucru_attach(device_t dev) sc->clks = rk3399_pmu_clks; sc->nclks = nitems(rk3399_pmu_clks); + sc->reset_offset = 0x110; + sc->reset_num = 30; + return (rk_cru_attach(dev)); } Modified: head/sys/arm64/rockchip/clk/rk_cru.c ============================================================================== --- head/sys/arm64/rockchip/clk/rk_cru.c Sat Sep 28 22:17:26 2019 (r352849) +++ head/sys/arm64/rockchip/clk/rk_cru.c Sat Sep 28 22:19:52 2019 (r352850) @@ -114,20 +114,23 @@ static int rk_cru_reset_assert(device_t dev, intptr_t id, bool reset) { struct rk_cru_softc *sc; + uint32_t reg; + int bit; uint32_t val; sc = device_get_softc(dev); - if (id >= sc->nresets || sc->resets[id].offset == 0) - return (0); + if (id > sc->reset_num) + return (ENXIO); + reg = sc->reset_offset + id / 16 * 4; + bit = id % 16; + mtx_lock(&sc->mtx); - val = CCU_READ4(sc, sc->resets[id].offset); + val = 0; if (reset) - val &= ~(1 << sc->resets[id].shift); - else - val |= 1 << sc->resets[id].shift; - CCU_WRITE4(sc, sc->resets[id].offset, val); + val = (1 << bit); + CCU_WRITE4(sc, reg, val | ((1 << bit) << 16)); mtx_unlock(&sc->mtx); return (0); @@ -137,18 +140,25 @@ static int rk_cru_reset_is_asserted(device_t dev, intptr_t id, bool *reset) { struct rk_cru_softc *sc; + uint32_t reg; + int bit; uint32_t val; sc = device_get_softc(dev); - if (id >= sc->nresets || sc->resets[id].offset == 0) - return (0); + if (id > sc->reset_num) + return (ENXIO); + reg = sc->reset_offset + id / 16 * 4; + bit = id % 16; mtx_lock(&sc->mtx); - val = CCU_READ4(sc, sc->resets[id].offset); - *reset = (val & (1 << sc->resets[id].shift)) != 0 ? false : true; + val = CCU_READ4(sc, reg); mtx_unlock(&sc->mtx); + *reset = true; + if (val & (1 << bit)) + *reset = true; + return (0); } @@ -256,8 +266,8 @@ rk_cru_attach(device_t dev) clk_set_assigned(dev, node); /* If we have resets, register our self as a reset provider */ - if (sc->resets) - hwreset_register_ofw_provider(dev); + /* if (sc->resets) */ + /* hwreset_register_ofw_provider(dev); */ return (0); } Modified: head/sys/arm64/rockchip/clk/rk_cru.h ============================================================================== --- head/sys/arm64/rockchip/clk/rk_cru.h Sat Sep 28 22:17:26 2019 (r352849) +++ head/sys/arm64/rockchip/clk/rk_cru.h Sat Sep 28 22:19:52 2019 (r352850) @@ -37,11 +37,6 @@ #include <arm64/rockchip/clk/rk_clk_mux.h> #include <arm64/rockchip/clk/rk_clk_pll.h> -struct rk_cru_reset { - uint32_t offset; - uint32_t shift; -}; - struct rk_cru_gate { const char *name; const char *parent_name; @@ -84,8 +79,8 @@ struct rk_cru_softc { struct clkdom *clkdom; struct mtx mtx; int type; - struct rk_cru_reset *resets; - int nresets; + uint32_t reset_offset; + uint32_t reset_num; struct rk_cru_gate *gates; int ngates; struct rk_clk *clks;
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