Date: Fri, 18 Oct 2019 02:18:17 +0000 (UTC) From: Conrad Meyer <cem@FreeBSD.org> To: src-committers@freebsd.org, svn-src-all@freebsd.org, svn-src-head@freebsd.org Subject: svn commit: r353712 - in head/sys/x86: include x86 Message-ID: <201910180218.x9I2IH0l035551@repo.freebsd.org>
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Author: cem Date: Fri Oct 18 02:18:17 2019 New Revision: 353712 URL: https://svnweb.freebsd.org/changeset/base/353712 Log: x86: Fetch and save standard CPUID leaf 6 in identcpu Rather than a few scattered places in the tree. Organize flag names in a contiguous region of specialreg.h. While here, delete deprecated PCOMMIT from leaf 7. No functional change. Modified: head/sys/x86/include/specialreg.h head/sys/x86/include/x86_var.h head/sys/x86/x86/identcpu.c head/sys/x86/x86/local_apic.c head/sys/x86/x86/tsc.c Modified: head/sys/x86/include/specialreg.h ============================================================================== --- head/sys/x86/include/specialreg.h Fri Oct 18 01:46:38 2019 (r353711) +++ head/sys/x86/include/specialreg.h Fri Oct 18 02:18:17 2019 (r353712) @@ -183,21 +183,6 @@ #define CPUID2_RDRAND 0x40000000 #define CPUID2_HV 0x80000000 -/* - * Important bits in the Thermal and Power Management flags - * CPUID.6 EAX and ECX. - */ -#define CPUTPM1_SENSOR 0x00000001 -#define CPUTPM1_TURBO 0x00000002 -#define CPUTPM1_ARAT 0x00000004 -#define CPUTPM1_HWP 0x00000080 -#define CPUTPM1_HWP_NOTIFICATION 0x00000100 -#define CPUTPM1_HWP_ACTIVITY_WINDOW 0x00000200 -#define CPUTPM1_HWP_PERF_PREF 0x00000400 -#define CPUTPM1_HWP_PKG 0x00000800 -#define CPUTPM1_HWP_FLEXIBLE 0x00020000 -#define CPUTPM2_EFFREQ 0x00000001 - /* Intel Processor Trace CPUID. */ /* Leaf 0 ebx. */ @@ -326,11 +311,35 @@ #define MWAIT_INTRBREAK 0x00000001 /* - * CPUID instruction 6 ecx info + * CPUID leaf 6: Thermal and Power management. */ -#define CPUID_PERF_STAT 0x00000001 -#define CPUID_PERF_BIAS 0x00000008 +/* Eax. */ +#define CPUTPM1_SENSOR 0x00000001 +#define CPUTPM1_TURBO 0x00000002 +#define CPUTPM1_ARAT 0x00000004 +#define CPUTPM1_PLN 0x00000010 +#define CPUTPM1_ECMD 0x00000020 +#define CPUTPM1_PTM 0x00000040 +#define CPUTPM1_HWP 0x00000080 +#define CPUTPM1_HWP_NOTIFICATION 0x00000100 +#define CPUTPM1_HWP_ACTIVITY_WINDOW 0x00000200 +#define CPUTPM1_HWP_PERF_PREF 0x00000400 +#define CPUTPM1_HWP_PKG 0x00000800 +#define CPUTPM1_HDC 0x00002000 +#define CPUTPM1_TURBO30 0x00004000 +#define CPUTPM1_HWP_CAPABILITIES 0x00008000 +#define CPUTPM1_HWP_PECI_OVR 0x00010000 +#define CPUTPM1_HWP_FLEXIBLE 0x00020000 +#define CPUTPM1_HWP_FAST_MSR 0x00040000 +#define CPUTPM1_HWP_IGN_IDLE 0x00100000 +/* Ebx. */ +#define CPUTPM_B_NSENSINTTHRESH 0x0000000f + +/* Ecx. */ +#define CPUID_PERF_STAT 0x00000001 +#define CPUID_PERF_BIAS 0x00000008 + /* * CPUID instruction 0xb ebx info. */ @@ -419,7 +428,7 @@ #define CPUID_STDEXT_ADX 0x00080000 #define CPUID_STDEXT_SMAP 0x00100000 #define CPUID_STDEXT_AVX512IFMA 0x00200000 -#define CPUID_STDEXT_PCOMMIT 0x00400000 +/* Formerly PCOMMIT */ #define CPUID_STDEXT_CLFLUSHOPT 0x00800000 #define CPUID_STDEXT_CLWB 0x01000000 #define CPUID_STDEXT_PROCTRACE 0x02000000 Modified: head/sys/x86/include/x86_var.h ============================================================================== --- head/sys/x86/include/x86_var.h Fri Oct 18 01:46:38 2019 (r353711) +++ head/sys/x86/include/x86_var.h Fri Oct 18 02:18:17 2019 (r353712) @@ -67,6 +67,10 @@ extern u_int cpu_mon_mwait_flags; extern u_int cpu_mon_min_size; extern u_int cpu_mon_max_size; extern u_int cpu_maxphyaddr; +extern u_int cpu_power_eax; +extern u_int cpu_power_ebx; +extern u_int cpu_power_ecx; +extern u_int cpu_power_edx; extern char ctx_switch_xsave[]; extern u_int hv_base; extern u_int hv_high; Modified: head/sys/x86/x86/identcpu.c ============================================================================== --- head/sys/x86/x86/identcpu.c Fri Oct 18 01:46:38 2019 (r353711) +++ head/sys/x86/x86/identcpu.c Fri Oct 18 02:18:17 2019 (r353712) @@ -118,6 +118,10 @@ u_int cpu_mon_mwait_flags; /* MONITOR/MWAIT flags (CPU u_int cpu_mon_min_size; /* MONITOR minimum range size, bytes */ u_int cpu_mon_max_size; /* MONITOR minimum range size, bytes */ u_int cpu_maxphyaddr; /* Max phys addr width in bits */ +u_int cpu_power_eax; /* 06H: Power management leaf, %eax */ +u_int cpu_power_ebx; /* 06H: Power management leaf, %eax */ +u_int cpu_power_ecx; /* 06H: Power management leaf, %eax */ +u_int cpu_power_edx; /* 06H: Power management leaf, %eax */ char machine[] = MACHINE; SYSCTL_UINT(_hw, OID_AUTO, via_feature_rng, CTLFLAG_RD, @@ -960,7 +964,8 @@ printcpuinfo(void) /* Supervisor Mode Access Prevention */ "\025SMAP" "\026AVX512IFMA" - "\027PCOMMIT" + /* Formerly PCOMMIT */ + "\027<b22>" "\030CLFLUSHOPT" "\031CLWB" "\032PROCTRACE" @@ -1550,6 +1555,14 @@ void identify_cpu2(void) { u_int regs[4], cpu_stdext_disable; + + if (cpu_high >= 6) { + cpuid_count(6, 0, regs); + cpu_power_eax = regs[0]; + cpu_power_ebx = regs[1]; + cpu_power_ecx = regs[2]; + cpu_power_edx = regs[3]; + } if (cpu_high >= 7) { cpuid_count(7, 0, regs); Modified: head/sys/x86/x86/local_apic.c ============================================================================== --- head/sys/x86/x86/local_apic.c Fri Oct 18 01:46:38 2019 (r353711) +++ head/sys/x86/x86/local_apic.c Fri Oct 18 02:18:17 2019 (r353712) @@ -480,8 +480,8 @@ native_lapic_init(vm_paddr_t addr) uint64_t r, r1, r2, rx; #endif uint32_t ver; - u_int regs[4]; - int i, arat; + int i; + bool arat; /* * Enable x2APIC mode if possible. Map the local APIC @@ -526,16 +526,9 @@ native_lapic_init(vm_paddr_t addr) SDT_APIC, SEL_KPL, GSEL_APIC); if ((resource_int_value("apic", 0, "clock", &i) != 0 || i != 0)) { - arat = 0; - /* Intel CPUID 0x06 EAX[2] set if APIC timer runs in C3. */ - if (cpu_vendor_id == CPU_VENDOR_INTEL && cpu_high >= 6) { - do_cpuid(0x06, regs); - if ((regs[0] & CPUTPM1_ARAT) != 0) - arat = 1; - } else if (cpu_vendor_id == CPU_VENDOR_AMD && - CPUID_TO_FAMILY(cpu_id) >= 0x12) { - arat = 1; - } + /* Set if APIC timer runs in C3. */ + arat = (cpu_power_eax & CPUTPM1_ARAT); + bzero(&lapic_et, sizeof(lapic_et)); lapic_et.et_name = "LAPIC"; lapic_et.et_flags = ET_FLAGS_PERIODIC | ET_FLAGS_ONESHOT | Modified: head/sys/x86/x86/tsc.c ============================================================================== --- head/sys/x86/x86/tsc.c Fri Oct 18 01:46:38 2019 (r353711) +++ head/sys/x86/x86/tsc.c Fri Oct 18 02:18:17 2019 (r353712) @@ -232,20 +232,16 @@ probe_tsc_freq(void) uint64_t tsc1, tsc2; uint16_t bootflags; - if (cpu_high >= 6) { - do_cpuid(6, regs); - if ((regs[2] & CPUID_PERF_STAT) != 0) { - /* - * XXX Some emulators expose host CPUID without actual - * support for these MSRs. We must test whether they - * really work. - */ - wrmsr(MSR_MPERF, 0); - wrmsr(MSR_APERF, 0); - DELAY(10); - if (rdmsr(MSR_MPERF) > 0 && rdmsr(MSR_APERF) > 0) - tsc_perf_stat = 1; - } + if (cpu_power_ecx & CPUID_PERF_STAT) { + /* + * XXX Some emulators expose host CPUID without actual support + * for these MSRs. We must test whether they really work. + */ + wrmsr(MSR_MPERF, 0); + wrmsr(MSR_APERF, 0); + DELAY(10); + if (rdmsr(MSR_MPERF) > 0 && rdmsr(MSR_APERF) > 0) + tsc_perf_stat = 1; } if (vm_guest == VM_GUEST_VMWARE) {
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