Date: Thu, 08 Jul 1999 07:35:16 -0600 From: Brett Glass <brett@lariat.org> To: Greg Lehey <grog@lemis.com> Cc: Phil Regnauld <regnauld@ftf.net>, David Scheidt <dscheidt@enteract.com>, Yann Ramin <atrus@matadore.montereyhigh.com>, freebsd-chat@FreeBSD.ORG Subject: Re: Intel's flops (was: IA64) Message-ID: <4.2.0.56.19990708073150.03f9d7d0@localhost> In-Reply-To: <19990708165644.G6035@freebie.lemis.com> References: <4.2.0.56.19990708010021.041462e0@localhost> <19990708081844.17503@ns.int.ftf.net> <Pine.BSF.4.10.9907071125170.20161-100000@matadore.montereyhigh.com> <Pine.NEB.3.96.990707120716.77528A-100000@shell-2.enteract. <4.2.0.56.19990707200123.00b36480@localhost> <19990708081844.17503@ns.int.ftf.net> <19990708153710.B6035@freebie.lemis.com> <4.2.0.56.19990708010021.041462e0@localhost>
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At 04:56 PM 7/8/99 +0930, Greg Lehey wrote: >My recollection was that the 432 was just plain too slow. The >instruction set was not conducive to performance. Actually, the instruction set was quite good. It was a bit stream, and sub-instructions that did things like add indexing or indirection could be added by tagging on a few bits. Much more efficient, in terms of bus bandwidth, than RISC. Trouble was, the CPU didn't fit on a single chip, and the chips that comprised it had very large die areas. Limitations in the logic of the time made the interface between the chips slower than it should have been, and there was no way to speed things up via pipelining or FIFOs; RAM was too dear. Today, that architecture could be built right. Then, it was too far ahead of its time. --Brett To Unsubscribe: send mail to majordomo@FreeBSD.org with "unsubscribe freebsd-chat" in the body of the message
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