Date: Fri, 19 Feb 2010 13:29:03 +0100 From: Grzegorz Bernacki <gjb@semihalf.com> To: ticso@cicely.de Cc: kostikbel@gmail.com, arm@freebsd.org, ticso@cicely7.cicely.de, current@freebsd.org Subject: Re: bind fails with sig11 on start / pthread failure on ARM? Message-ID: <4B7E840F.2040709@semihalf.com> In-Reply-To: <20100219120754.GE43625@cicely7.cicely.de> References: <20100218131010.GQ50403@deviant.kiev.zoral.com.ua> <20100219031200.GY43625@cicely7.cicely.de> <20100219033000.GZ43625@cicely7.cicely.de> <20100218.204739.680961627231021262.imp@bsdimp.com> <20100219041200.GC43625@cicely7.cicely.de> <20100219120754.GE43625@cicely7.cicely.de>
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Bernd Walter wrote:
> On Fri, Feb 19, 2010 at 05:12:06AM +0100, Bernd Walter wrote:
>> On Thu, Feb 18, 2010 at 08:47:39PM -0700, M. Warner Losh wrote:
>>> In message: <20100219033000.GZ43625@cicely7.cicely.de>
>>> Bernd Walter <ticso@cicely7.cicely.de> writes:
>>> : Warner - it names you in the copyright, so very likely you know this code.
>>> : I will build a debug version of bind, but as usual it will take some
>>> : time...
>>>
>>> Make sure that the code matches our current atomics code...
>> There are just 3 functions.
>> isc_atomic_xadd and isc_atomic_store just wrap to atomic_fetchadd_int and
>> atomic_store_rel_int
>> isc_atomic_cmpxchg is inline assembly, but I don't think we have such a
>> function in our ARM atomic.h - at least I can't find it.
>
> #0 0x0015521c in isc_atomic_cmpxchg (p=0x155214, cmpval=0, val=1) at atomic.h:75
> 75 }
> [New Thread 20804500 (LWP 100100)]
> [New Thread 208043c0 (LWP 100099)]
> [New Thread 20804280 (LWP 100098)]
> [New Thread 20804140 (LWP 100043)]
> (gdb) bt
> #0 0x0015521c in isc_atomic_cmpxchg (p=0x155214, cmpval=0, val=1) at atomic.h:75
> #1 0x00155a20 in isc_rwlock_lock (rwl=0x1c0fd4, type=isc_rwlocktype_write)
> at /data/builder/arm-current/head/lib/bind/isc/../../../contrib/bind9/lib/isc/rwlock.c:325
> #2 0x000f8144 in dns_db_register (name=0x173fe8 "_builtin", create=0x4d46c <dns_sdb_create>, driverarg=0x2092b078,
> mctx=0x2080e0c0, dbimp=0x2092b08c) at /data/builder/arm-current/head/lib/bind/dns/../../../contrib/bind9/lib/dns/db.c:821
> #3 0x0004d0b4 in dns_sdb_register (drivername=0x173fe8 "_builtin", methods=Variable "methods" is not available.
> )
> at /data/builder/arm-current/head/lib/bind/dns/../../../contrib/bind9/lib/dns/sdb.c:239
> #4 0x0000c96c in ns_builtin_init () at /data/builder/arm-current/head/usr.sbin/named/../../contrib/bind9/bin/named/builtin.c:296
> #5 0x0001a97c in $a () at /data/builder/arm-current/head/usr.sbin/named/../../contrib/bind9/bin/named/main.c:741
> #6 0x0001a97c in $a () at /data/builder/arm-current/head/usr.sbin/named/../../contrib/bind9/bin/named/main.c:741
> (gdb) print p
> $1 = (isc_int32_t *) 0x155214
> (gdb) print *p
> $2 = -498139128
> (gdb)
>
> Initially it looks like a valid pointer.
> But it also looks like a pointer in codespace, which of course would be
> non-writeable and can't be updated.
>
Hi,
Some time ago we changed an address of RAS. Probably that's the problem. Please try
with patch below.
grzesiek
diff --git a/contrib/bind9/lib/isc/arm/include/isc/atomic.h b/contrib/bind9/lib/
index 6a6e984..2f12921 100644
--- a/contrib/bind9/lib/isc/arm/include/isc/atomic.h
+++ b/contrib/bind9/lib/isc/arm/include/isc/atomic.h
@@ -53,9 +53,9 @@ isc_atomic_cmpxchg(isc_int32_t *p, isc_int32_t cmpval, isc_int
__asm __volatile("1:\n"
"adr %1, 1b\n"
- "mov %0, #0xe0000004\n"
+ "mov %0, #0xffff1004\n"
"str %1, [%0]\n"
- "mov %0, #0xe0000008\n"
+ "mov %0, #0xffff1008\n"
"adr %1, 2f\n"
"str %1, [%0]\n"
"ldr %1, [%2]\n"
@@ -63,10 +63,10 @@ isc_atomic_cmpxchg(isc_int32_t *p, isc_int32_t cmpval, isc_i
"streq %4, [%2]\n"
"2:\n"
"mov %3, #0\n"
- "mov %0, #0xe0000004\n"
+ "mov %0, #0xffff1004\n"
"str %3, [%0]\n"
"mov %3, #0xffffffff\n"
- "mov %0, #0xe0000008\n"
+ "mov %0, #0xffff1008\n"
"str %3, [%0]\n"
: "=r" (ras_start), "=r" (done)
,"+r" (p), "+r" (cmpval), "+r" (val) : : "memory");
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