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Date:      Sun, 7 Jul 2013 19:19:18 +0000 (UTC)
From:      Rui Paulo <rpaulo@FreeBSD.org>
To:        src-committers@freebsd.org, svn-src-all@freebsd.org, svn-src-head@freebsd.org
Subject:   svn commit: r252996 - head/sys/arm/arm
Message-ID:  <201307071919.r67JJI4x005389@svn.freebsd.org>

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Author: rpaulo
Date: Sun Jul  7 19:19:18 2013
New Revision: 252996
URL: http://svnweb.freebsd.org/changeset/base/252996

Log:
  Fix all the compiler warnings in elf_trampoline.c.

Modified:
  head/sys/arm/arm/elf_trampoline.c

Modified: head/sys/arm/arm/elf_trampoline.c
==============================================================================
--- head/sys/arm/arm/elf_trampoline.c	Sun Jul  7 19:13:34 2013	(r252995)
+++ head/sys/arm/arm/elf_trampoline.c	Sun Jul  7 19:19:18 2013	(r252996)
@@ -49,51 +49,67 @@ void _start(void);
 void __start(void);
 void __startC(void);
 
+extern unsigned int cpufunc_id(void);
+extern void armv6_idcache_wbinv_all(void);
+extern void do_call(void *, void *, void *, int);
+
 #define GZ_HEAD	0xa
 
 #ifdef CPU_ARM7TDMI
 #define cpu_idcache_wbinv_all	arm7tdmi_cache_flushID
+extern void arm7tdmi_cache_flushID(void);
 #elif defined(CPU_ARM8)
 #define cpu_idcache_wbinv_all	arm8_cache_purgeID
+extern void arm8_cache_purgeID(void);
 #elif defined(CPU_ARM9)
 #define cpu_idcache_wbinv_all	arm9_idcache_wbinv_all
+extern void arm9_idcache_wbinv_all(void);
 #elif defined(CPU_FA526) || defined(CPU_FA626TE)
 #define cpu_idcache_wbinv_all	fa526_idcache_wbinv_all
+extern void fa526_idcache_wbinv_all(void);
 #elif defined(CPU_ARM9E)
 #define cpu_idcache_wbinv_all	armv5_ec_idcache_wbinv_all
+extern void armv5_ec_idcache_wbinv_all(void);
 #elif defined(CPU_ARM10)
 #define cpu_idcache_wbinv_all	arm10_idcache_wbinv_all
+extern void arm10_idcache_wbinv_all(void);
 #elif defined(CPU_ARM1136) || defined(CPU_ARM1176)
 #define cpu_idcache_wbinv_all	armv6_idcache_wbinv_all
 #elif defined(CPU_SA110) || defined(CPU_SA1110) || defined(CPU_SA1100) || \
     defined(CPU_IXP12X0)
 #define cpu_idcache_wbinv_all	sa1_cache_purgeID
+extern void sa1_cache_purgeID(void);
 #elif defined(CPU_XSCALE_80200) || defined(CPU_XSCALE_80321) || \
   defined(CPU_XSCALE_PXA2X0) || defined(CPU_XSCALE_IXP425) ||	\
   defined(CPU_XSCALE_80219)
 #define cpu_idcache_wbinv_all	xscale_cache_purgeID
+extern void xscale_cache_purgeID(void);
 #elif defined(CPU_XSCALE_81342)
 #define cpu_idcache_wbinv_all	xscalec3_cache_purgeID
+extern void xscalec3_cache_purgeID(void);
 #elif defined(CPU_MV_PJ4B)
 #if !defined(SOC_MV_ARMADAXP)
 #define cpu_idcache_wbinv_all	armv6_idcache_wbinv_all
+extern void armv6_idcache_wbinv_all(void);
 #else
 #define cpu_idcache_wbinv_all()	armadaxp_idcache_wbinv_all
+extern void armadaxp_idcache_wbinv_all(void);
 #endif
 #endif /* CPU_MV_PJ4B */
 #ifdef CPU_XSCALE_81342
 #define cpu_l2cache_wbinv_all	xscalec3_l2cache_purge
+extern void xscalec3_l2cache_purge(void);
 #elif defined(SOC_MV_KIRKWOOD) || defined(SOC_MV_DISCOVERY)
 #define cpu_l2cache_wbinv_all	sheeva_l2cache_wbinv_all
+extern void sheeva_l2cache_wbinv_all(void);
 #elif defined(CPU_CORTEXA)
 #define cpu_idcache_wbinv_all	armv7_idcache_wbinv_all
+extern void armv7_idcache_wbinv_all(void);
 #define cpu_l2cache_wbinv_all()
 #else
 #define cpu_l2cache_wbinv_all()	
 #endif
 
-static void armadaxp_idcache_wbinv_all(void);
-
 int     arm_picache_size;
 int     arm_picache_line_size;
 int     arm_picache_ways;
@@ -434,11 +450,11 @@ static void *
 inflate_kernel(void *kernel, void *startaddr)
 {
 	struct inflate infl;
-	char slide[GZ_WSIZE];
+	unsigned char slide[GZ_WSIZE];
 
 	orig_input = kernel;
 	memcnt = memtot = 0;
-	i_input = (char *)kernel + GZ_HEAD;
+	i_input = (unsigned char *)kernel + GZ_HEAD;
 	if (((char *)kernel)[3] & 0x18) {
 		while (*i_input)
 			i_input++;
@@ -590,6 +606,8 @@ load_kernel(unsigned int kstart, unsigne
 	__asm __volatile(".globl func_end\n"
 	    "func_end:");
 	
+	/* NOTREACHED */
+	return NULL;
 }
 
 extern char func_end[];



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