Date: Fri, 18 Jul 2003 16:45:51 -0700 (PDT) From: Julian Elischer <julian@elischer.org> To: Marcel Moolenaar <marcel@xcllnt.net> Cc: threads@freebsd.org Subject: Re: Rearranging kse mailbox Message-ID: <Pine.BSF.4.21.0307181643480.14696-100000@InterJet.elischer.org> In-Reply-To: <20030718223119.GB35221@dhcp01.pn.xcllnt.net>
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On Fri, 18 Jul 2003, Marcel Moolenaar wrote: > On Fri, Jul 18, 2003 at 03:08:40PM -0700, Julian Elischer wrote: > > > > the ia64 requires that the thread pointer points to > > aome location that is 16 bytes long, the first 8 bytes > > of which is a pointer to the TLS Dynamic thread vector, and the 2nd 8 > > bytes is application specific, but in practice, must be a pointer to > > the Thread's or KSE's mailbox (I guess KSE to be similar to the others.) > > > > ia32 requires just that the thread control info pointed to by %gs > > SOMEWHERE contains a pointer to the dtv (where SOMEWHERE is a known > > offset). (In our case the offset would be 0) > > > > This means that for the UTS to find the active thread under ia64 > > takes an extra level of indirection. (node neither of these > > affect upcalls as teh UTS upcall target function has the mailbox as an > > argument and can access it independently of %gs or the tp. > > > > Am I right that "variant 2" (as seen in the ia32 case) > > applies to allarchitectures other than ia64? > > That is what I need to find out. If the runtime specification has > a register dedicated for TLS, like on ia64, it will likely behave > more like ia64 than ia32. I think the amd64 runtime is new enough > for it to be like ia64. > > Note that the extra level of indirection on ia64 can be avoided if > we put the thread control structure at a negative offset from TP. > The layout would be something like: > > -... 0 8 16 ...+ > [thread structure][DTV pointer][free][static TLS] > ^ > TP Looks that way (assuming no 'gotcha's' that make the size of the thread structure unpredicatable.) > > -- > Marcel Moolenaar USPA: A-39004 marcel@xcllnt.net >
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