Date: Fri, 30 Nov 2012 05:40:25 +0000 (UTC) From: Peter Grehan <grehan@FreeBSD.org> To: src-committers@freebsd.org, svn-src-projects@freebsd.org Subject: svn commit: r243703 - projects/bhyve/sys/amd64/vmm Message-ID: <201211300540.qAU5ePZj024989@svn.freebsd.org>
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Author: grehan Date: Fri Nov 30 05:40:24 2012 New Revision: 243703 URL: http://svnweb.freebsd.org/changeset/base/243703 Log: Properly screen for the AND 0x81 instruction from the set of group1 0x81 instructions that use the reg bits as an extended opcode. Still todo: properly update rflags. Pointed out by: jilles@ Modified: projects/bhyve/sys/amd64/vmm/vmm_instruction_emul.c Modified: projects/bhyve/sys/amd64/vmm/vmm_instruction_emul.c ============================================================================== --- projects/bhyve/sys/amd64/vmm/vmm_instruction_emul.c Fri Nov 30 05:30:31 2012 (r243702) +++ projects/bhyve/sys/amd64/vmm/vmm_instruction_emul.c Fri Nov 30 05:40:24 2012 (r243703) @@ -83,6 +83,7 @@ static const struct vie_op one_byte_opco .op_type = VIE_OP_TYPE_AND, }, [0x81] = { + /* XXX Group 1 extended opcode - not just AND */ .op_byte = 0x81, .op_type = VIE_OP_TYPE_AND, .op_flags = VIE_OP_F_IMM, @@ -311,7 +312,13 @@ emulate_and(void *vm, int vcpuid, uint64 * * 81/ and r/m32, imm32 * REX.W + 81/ and r/m64, imm32 sign-extended to 64 + * + * Currently, only the AND operation of the 0x81 opcode + * is implemented (ModRM:reg = b100). */ + if ((vie->reg & 7) != 4) + break; + if (vie->rex_w) size = 8;
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