Date: Wed, 26 Dec 2018 10:47:09 +0000 (UTC) From: Kashyap D Desai <kadesai@FreeBSD.org> To: src-committers@freebsd.org, svn-src-all@freebsd.org, svn-src-head@freebsd.org Subject: svn commit: r342538 - head/sys/dev/mrsas Message-ID: <201812261047.wBQAl91Z041426@repo.freebsd.org>
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Author: kadesai Date: Wed Dec 26 10:47:08 2018 New Revision: 342538 URL: https://svnweb.freebsd.org/changeset/base/342538 Log: This patch will add support for 32 bit atomic request descriptor for Aero adapters. For Aero adapters- 1. Driver will use 32 bit atomic descriptor to fire IOs and DCMDs. 2. Driver will use 64 bit request descriptor to fire IOC INIT. 3. If Aero firmware supports 32 bit atomic descriptor, then only driver will use it otherwise driver will use 64 bit request descriptor. For rest of adapters(Ventura, Invader and Thunderbolt), driver will use 64 bit request descriptors only. Submitted by: Sumit Saxena <sumit.saxena@broadcom.com> Reviewed by: Kashyap Desai <Kashyap.Desai@broadcom.com> Approved by: ken MFC after: 3 days Sponsored by: Broadcom Inc Modified: head/sys/dev/mrsas/mrsas.c head/sys/dev/mrsas/mrsas.h Modified: head/sys/dev/mrsas/mrsas.c ============================================================================== --- head/sys/dev/mrsas/mrsas.c Wed Dec 26 10:46:23 2018 (r342537) +++ head/sys/dev/mrsas/mrsas.c Wed Dec 26 10:47:08 2018 (r342538) @@ -171,6 +171,9 @@ void mrsas_release_mpt_cmd(struct mrsas_mpt_cmd *cmd); void mrsas_map_mpt_cmd_status(struct mrsas_mpt_cmd *cmd, union ccb *ccb_ptr, u_int8_t status, u_int8_t extStatus, u_int32_t data_length, u_int8_t *sense); +void +mrsas_write_64bit_req_desc(struct mrsas_softc *sc, u_int32_t req_desc_lo, + u_int32_t req_desc_hi); SYSCTL_NODE(_hw, OID_AUTO, mrsas, CTLFLAG_RD, 0, "MRSAS Driver Parameters"); @@ -2728,7 +2731,7 @@ mrsas_ioc_init(struct mrsas_softc *sc) mrsas_disable_intr(sc); mrsas_dprint(sc, MRSAS_OCR, "Issuing IOC INIT command to FW.\n"); - mrsas_fire_cmd(sc, req_desc.addr.u.low, req_desc.addr.u.high); + mrsas_write_64bit_req_desc(sc, req_desc.addr.u.low, req_desc.addr.u.high); /* * Poll response timer to wait for Firmware response. While this @@ -2754,6 +2757,15 @@ mrsas_ioc_init(struct mrsas_softc *sc) retcode = 1; } + if (sc->is_aero) { + scratch_pad_2 = mrsas_read_reg(sc, offsetof(mrsas_reg_set, + outbound_scratch_pad_2)); + sc->atomic_desc_support = (scratch_pad_2 & + MR_ATOMIC_DESCRIPTOR_SUPPORT_OFFSET) ? 1 : 0; + device_printf(sc->mrsas_dev, "FW supports atomic descriptor: %s\n", + sc->atomic_desc_support ? "Yes" : "No"); + } + mrsas_free_ioc_cmd(sc); return (retcode); } @@ -2853,16 +2865,13 @@ mrsas_alloc_mpt_cmds(struct mrsas_softc *sc) } /* - * mrsas_fire_cmd: Sends command to FW + * mrsas_write_64bit_req_dsc: Writes 64 bit request descriptor to FW * input: Adapter softstate - * request descriptor address low - * request descriptor address high - * - * This functions fires the command to Firmware by writing to the - * inbound_low_queue_port and inbound_high_queue_port. + * request descriptor address low + * request descriptor address high */ void -mrsas_fire_cmd(struct mrsas_softc *sc, u_int32_t req_desc_lo, +mrsas_write_64bit_req_desc(struct mrsas_softc *sc, u_int32_t req_desc_lo, u_int32_t req_desc_hi) { mtx_lock(&sc->pci_lock); @@ -2871,6 +2880,26 @@ mrsas_fire_cmd(struct mrsas_softc *sc, u_int32_t req_d mrsas_write_reg(sc, offsetof(mrsas_reg_set, inbound_high_queue_port), req_desc_hi); mtx_unlock(&sc->pci_lock); +} + +/* + * mrsas_fire_cmd: Sends command to FW + * input: Adapter softstate + * request descriptor address low + * request descriptor address high + * + * This functions fires the command to Firmware by writing to the + * inbound_low_queue_port and inbound_high_queue_port. + */ +void +mrsas_fire_cmd(struct mrsas_softc *sc, u_int32_t req_desc_lo, + u_int32_t req_desc_hi) +{ + if (sc->atomic_desc_support) + mrsas_write_reg(sc, offsetof(mrsas_reg_set, inbound_single_queue_port), + req_desc_lo); + else + mrsas_write_64bit_req_desc(sc, req_desc_lo, req_desc_hi); } /* Modified: head/sys/dev/mrsas/mrsas.h ============================================================================== --- head/sys/dev/mrsas/mrsas.h Wed Dec 26 10:46:23 2018 (r342537) +++ head/sys/dev/mrsas/mrsas.h Wed Dec 26 10:47:08 2018 (r342538) @@ -1259,7 +1259,7 @@ typedef struct _mrsas_register_set { u_int32_t inbound_high_queue_port; /* 00C4h */ - u_int32_t reserved_5; /* 00C8h */ + u_int32_t inbound_single_queue_port; /* 00C8h */ u_int32_t res_6[11]; /* CCh */ u_int32_t host_diag; u_int32_t seq_offset; @@ -2316,6 +2316,8 @@ struct mrsas_ctrl_info { */ #define MR_CAN_HANDLE_SYNC_CACHE_OFFSET 0X01000000 +#define MR_ATOMIC_DESCRIPTOR_SUPPORT_OFFSET (1 << 24) + /* * FW reports the maximum of number of commands that it can accept (maximum * commands that can be outstanding) at any time. The driver must report a @@ -3366,6 +3368,7 @@ struct mrsas_softc { boolean_t is_ventura; boolean_t is_aero; boolean_t msix_combined; + boolean_t atomic_desc_support; u_int16_t maxRaidMapSize; /* Non dma-able memory. Driver local copy. */
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