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Date:      Sun, 15 Sep 2019 23:56:40 +0000 (UTC)
From:      Alexander Motin <mav@FreeBSD.org>
To:        src-committers@freebsd.org, svn-src-all@freebsd.org, svn-src-head@freebsd.org
Subject:   svn commit: r352369 - head/sys/dev/uart
Message-ID:  <201909152356.x8FNuen4070712@repo.freebsd.org>

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Author: mav
Date: Sun Sep 15 23:56:39 2019
New Revision: 352369
URL: https://svnweb.freebsd.org/changeset/base/352369

Log:
  Relax TX draining in ns8250_bus_transmit().
  
  Since TX interrupt is generated when THRE is set, wait for TEMT set means
  wait for full character transmission time.  At low speeds that may take
  awhile, burning CPU time while holding sc_hwmtx lock, also congested.
  
  This is partial revert of r317659.
  
  PR:		240121
  MFC after:	2 weeks

Modified:
  head/sys/dev/uart/uart_dev_ns8250.c

Modified: head/sys/dev/uart/uart_dev_ns8250.c
==============================================================================
--- head/sys/dev/uart/uart_dev_ns8250.c	Sun Sep 15 21:32:19 2019	(r352368)
+++ head/sys/dev/uart/uart_dev_ns8250.c	Sun Sep 15 23:56:39 2019	(r352369)
@@ -1029,13 +1029,8 @@ ns8250_bus_transmit(struct uart_softc *sc)
 
 	bas = &sc->sc_bas;
 	uart_lock(sc->sc_hwmtx);
-	if (sc->sc_txdatasz > 1) {
-		if ((uart_getreg(bas, REG_LSR) & LSR_TEMT) == 0)
-			ns8250_drain(bas, UART_DRAIN_TRANSMITTER);
-	} else {
-		while ((uart_getreg(bas, REG_LSR) & LSR_THRE) == 0)
-			DELAY(4);
-	}
+	while ((uart_getreg(bas, REG_LSR) & LSR_THRE) == 0)
+		DELAY(4);
 	for (i = 0; i < sc->sc_txdatasz; i++) {
 		uart_setreg(bas, REG_DATA, sc->sc_txbuf[i]);
 		uart_barrier(bas);



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