Date: Thu, 16 Nov 2017 09:15:03 +0900 (JST) From: Mori Hiroki <yamori813@yahoo.co.jp> To: Landon J Fuller <landonf@freebsd.org>, "freebsd-mips@freebsd.org" <freebsd-mips@freebsd.org> Subject: Re: MIPS INTRNG changes Message-ID: <506753.3523.qm@web101712.mail.ssk.yahoo.co.jp> In-Reply-To: <742722.83866.qm@web101707.mail.ssk.yahoo.co.jp> References: <1510699808.25350.3@smtp.office.plausible.coop> <742722.83866.qm@web101707.mail.ssk.yahoo.co.jp>
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Hi=0A=0AWork fine this patch.=0A=0AI checked this.=0A=0ACorega CG-WLCVR54AG= =A0AR5312=A0=0ANec WR1200=A0AR5315=0A=0AThanks=0A=0AHiroki Mori=0A=0A=0A---= -- Original Message -----=0A> From: Mori Hiroki <yamori813@yahoo.co.jp>=0A>= To: Landon J Fuller <landonf@freebsd.org>; "freebsd-mips@freebsd.org" <fre= ebsd-mips@freebsd.org>=0A> Cc: =0A> Date: 2017/11/15, Wed 23:23=0A> Subject= : Re: MIPS INTRNG changes=0A> =0A> Hi=0A> =0A> sys/mips/atheros/ar531x/ is = non-FDT and INTERNG.=0A> =0A> I will check this patch on real cpu tomorrow.= =0A> =0A> Hiroki Mori=A0=0A> =0A> =0A> ----- Original Message -----=0A>>=A0= =A0From: Landon J Fuller <landonf@freebsd.org>=0A>>=A0=A0To: freebsd-mips@f= reebsd.org=0A>>=A0=A0Cc: =0A>>=A0=A0Date: 2017/11/15, Wed 07:50=0A>>=A0=A0S= ubject: MIPS INTRNG changes=0A>> =0A>>=A0=A0Howdy -=0A>> =0A>>=A0=A0To supp= ort nested INTRNG interrupt controllers on non-FDT MIPS targets, =0A> I've= =0A>>=A0=A0implemented a replacement for the cpu_establish_[hard|soft]intr(= ) =0A> workaround=0A>>=A0=A0introduced in r305527 (D7692); I'll be commitin= g this in three days =0A> unless=0A>>=A0=A0anyone objects:=0A>> =0A>>=A0=A0= https://reviews.freebsd.org/D12385=0A>>; =0A>>=A0=A0Background:=0A>> =0A>>= =A0=A0Since non-FDT INTRNG targets do not have an equivalent to =0A> OFW_BU= S_MAP_INTR(),=0A>>=A0=A0it is necessary for the MIPS nexus driver to implic= itly establish INTRNG=0A>>=A0=A0interrupt mappings on behalf of child devic= es.=0A>> =0A>>=A0=A0The workaround introduced in r305527 implements this as= follows, on non-FDT=0A>>=A0=A0INTRNG MIPS targets:=0A>> =0A>>=A0=A0- mips/= nexus.c assumes that all bus interrupt requests are for a MIPS=0A>>=A0=A0= =A0 interrupt managed by mips/mips_pic.c=0A>>=A0=A0- Call mips_pic's cpu_cr= eate_intr_map() from nexus_activate_resource() =0A> to=0A>>=A0=A0=A0 alloca= te a new interrupt mapping on-demand.=0A>>=A0=A0- Call mips_pic's cpu_get_i= rq_resource() from nexus_setup_intr() to =0A> fetch a=0A>>=A0=A0=A0 shared = IRQ struct resource for the MIPS interrupt.=0A>> =0A>>=A0=A0In addition to = assuming that all IRQs are owned by mips_pic, on-demand IRQ=0A>>=A0=A0mappi= ng in the BUS_ACTIVATE_RESOURCE() path produces some unexpected =0A> behavi= or:=0A>> =0A>>=A0=A0- Any child bus that uses bus_generic_rl_alloc_resource= () or =0A>>=A0=A0resource_list_alloc()=0A>>=A0=A0to implement BUS_ALLOC_RES= OURCE() will update the child device's =0A> resource=0A>>=A0=A0list entry t= o reference the newly mapped IRQ -- but only if the resource is=0A>>=A0=A0a= llocated with the RF_ACTIVE flag, resulting in BUS_ACTIVATE_RESOURCE() =0A>= being=0A>>=A0=A0called from BUS_ALLOC_RESOURCE() before the resource_list_= entry update is=0A>>=A0=A0performed.=0A>>=A0=A0- BUS_ACTIVATE_RESOURCE() is= itself not resource_list-aware; if RF_ACTIVE =0A> is=0A>>=A0=A0not set dur= ing allocation, and bus_activate_resource() is instead called=0A>>=A0=A0dir= ectly, the child's resource list entry will _not_ updated to the =0A> newly= =0A>>=A0=A0mapped IRQ.=0A>> =0A>>=A0=A0Since the resource_list_entry _may_ = be updated to reference the IRQ =0A> mapping, =0A>>=A0=A0IRQs=0A>>=A0=A0map= pings implicitly created in nexus_activate_resource() cannot be =0A> implic= itly=0A>>=A0=A0unmapped in nexus_deactivate_resource() and must be leaked, = as references =0A> to=0A>>=A0=A0the mapping may remain in a child's resourc= e_list_entry.=0A>> =0A>>=A0=A0Rather than performing on-demand mapping duri= ng resource activation, my =0A> changes=0A>>=A0=A0preemptively produce (on = non-FDT targets) a set of IRQ mappings for all =0A> MIPS=0A>>=A0=A0IRQs in = nexus_attach(), using a fixed range of INTRNG IRQ assignments (0-7) =0A> th= at=0A>>=A0=A0may be statically referenced by child devices.=0A>> =0A>>=A0= =A0With D12385, the mips nexus behavior will now be:=0A>> =0A>>=A0=A0- On n= on-FDT MIPS INTRNG targets, produce a set of fixed MIPS IRQ mappings=0A>>= =A0=A0=A0 in nexus_attach() for the MIPS IRQ range.=0A>>=A0=A0- On all MIPS= INTRNG targets, call mips_pic_activate_intr() from=0A>>=A0=A0=A0 nexus_act= ivate_resource() to perform activation; this will either perform=0A>>=A0=A0= =A0 mips_pic-specific activation if the IRQ is found in mips_pic' table =0A= > of=0A>>=A0=A0=A0 MIPS IRQ mappings, or will call intr_activate_irq() for = IRQs not managed =0A> by=0A>>=A0=A0=A0 mips_pic (e.g. IRQs mapped by a chil= d PIC).=0A>>=A0=A0- On all MIPS INTRNG targets, call mips_pic_deactivate_in= tr() from=0A>>=A0=A0=A0 nexus_deactivate_resource(); this will either perfo= rm mips_pic-specific=0A>>=A0=A0=A0 deactivation, or call intr_deactivate_ir= q() for IRQs not managed by=0A>>=A0=A0=A0 mips_pic.=0A>> =0A>>=A0=A0Cheers,= =0A>>=A0=A0Landon=0A>> =0A>>=A0=A0_________________________________________= ______=0A>>=A0=A0freebsd-mips@freebsd.org mailing list=0A>>=A0=A0https://li= sts.freebsd.org/mailman/listinfo/freebsd-mips=0A>>=A0=A0To unsubscribe, sen= d any mail to =0A>>=A0=A0"freebsd-mips-unsubscribe@freebsd.org"=0A>> =0A> _= ______________________________________________=0A> freebsd-mips@freebsd.org= mailing list=0A> https://lists.freebsd.org/mailman/listinfo/freebsd-mips= =0A> To unsubscribe, send any mail to =0A> "freebsd-mips-unsubscribe@freebs= d.org"=0A>
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