Date: Tue, 29 Nov 2016 04:32:15 +0000 (UTC) From: "Jayachandran C." <jchandra@FreeBSD.org> To: src-committers@freebsd.org, svn-src-all@freebsd.org, svn-src-head@freebsd.org Subject: svn commit: r309276 - head/sys/dev/uart Message-ID: <201611290432.uAT4WF8c050560@repo.freebsd.org>
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Author: jchandra Date: Tue Nov 29 04:32:14 2016 New Revision: 309276 URL: https://svnweb.freebsd.org/changeset/base/309276 Log: Fix interrupt clear in pl011 uart receive function Clear the interrupt state before reading the input char from the input FIFO. In the current code there is a window between the read to the data register and the write to the the ICR, during which an input char will not cause an interrupt. This fixes the issue by which the serial port input on QEMU freezes when using the emulated pl011 serial port. Modified: head/sys/dev/uart/uart_dev_pl011.c Modified: head/sys/dev/uart/uart_dev_pl011.c ============================================================================== --- head/sys/dev/uart/uart_dev_pl011.c Tue Nov 29 01:08:09 2016 (r309275) +++ head/sys/dev/uart/uart_dev_pl011.c Tue Nov 29 04:32:14 2016 (r309276) @@ -443,6 +443,8 @@ uart_pl011_bus_receive(struct uart_softc sc->sc_rxbuf[sc->sc_rxput] = UART_STAT_OVERRUN; break; } + + __uart_setreg(bas, UART_ICR, (UART_RXREADY | RIS_RTIM)); xc = __uart_getreg(bas, UART_DR); rx = xc & 0xff; @@ -451,8 +453,6 @@ uart_pl011_bus_receive(struct uart_softc if (xc & DR_PE) rx |= UART_STAT_PARERR; - __uart_setreg(bas, UART_ICR, (UART_RXREADY | RIS_RTIM)); - uart_rx_put(sc, rx); ints = __uart_getreg(bas, UART_MIS); }
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