Date: Wed, 7 Dec 2005 09:06:03 -0500 From: John Baldwin <jhb@freebsd.org> To: freebsd-current@freebsd.org Cc: Darren Pilgrim <darren.pilgrim@bitfreak.org> Subject: Re: can someone explain...[ PCI interrupts] Message-ID: <200512070906.05117.jhb@freebsd.org> In-Reply-To: <018e01c5fafe$c9154a20$642a15ac@smiley> References: <018e01c5fafe$c9154a20$642a15ac@smiley>
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On Wednesday 07 December 2005 02:20 am, Darren Pilgrim wrote: > From: John Baldwin > > > The reason [for masking interrupts] is that PCI interrupts are level > > triggered, so they won't "shut up" until the ISR has run and pacified > > the PCI device. > > But PCI interrupts can be programmed either level- or edge-triggered, so > wouldn't programming to edge-triggered interrupts solve the "they won't > shut up" issue? No, PCI interrupts are level triggered. Individual APIC pins can be=20 programmed to be edge-triggered, sure. However, then interrupts stop worki= ng=20 if 2 devices are sharing a line and one interrupts after the other has=20 already interrupted and after the second device's ISR has already run. In= =20 this case, the ithread will finish and go back to sleep waiting for an=20 interrupt. However, since the ISR for the second device wasn't run after=20 that device asserted its interrupt pin, the second device will keep the pin= =20 pulled low forever, so there will never be a hi -> low transition that the= =20 APIC pin would post an interrupt for and that intpin and all attached devic= es=20 are effectively dead. =2D-=20 John Baldwin <jhb@FreeBSD.org> =A0<>< =A0http://www.FreeBSD.org/~jhb/ "Power Users Use the Power to Serve" =A0=3D =A0http://www.FreeBSD.org
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