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Date:      Mon, 17 Dec 2001 19:14:21 -0700
From:      Warner Losh <imp@harmony.village.org>
To:        Terry Lambert <tlambert2@mindspring.com>
Cc:        Thomas Moestl <tmoestl@gmx.net>, arch@FreeBSD.ORG
Subject:   Re: Please review: changes to MI bus code for sparc64 
Message-ID:  <200112180214.fBI2ELM81094@harmony.village.org>
In-Reply-To: Your message of "Thu, 13 Dec 2001 14:32:16 PST." <3C192C70.9A79B3C5@mindspring.com> 
References:  <3C192C70.9A79B3C5@mindspring.com>  <20011213192033.A871@crow.dom2ip.de> <3C18F78D.C537D487@mindspring.com> <20011213201213.B871@crow.dom2ip.de> 

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In message <3C192C70.9A79B3C5@mindspring.com> Terry Lambert writes:
: > > The PCI_BROKEN_INTPIN/PCI_INTLINE_0_BAD seem to be the same thing;
: 
: Still agree with Mike.

PCI_INTLINE_0_BAD is already needed by i386 port.  There are a number
of broken bioses that do this.  All of them impact the CardBus bridge,
so there is a hack in the current code for both 255 and 0.  I think
that the right way to do this is to see intline 0 on the initial read
of config space, and quietly changing it to 255.  There are many
places in the code we don't check, but should...

Warner

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