Date: Sun, 28 Dec 2014 20:02:06 +0000 (UTC) From: Dimitry Andric <dim@FreeBSD.org> To: src-committers@freebsd.org, svn-src-projects@freebsd.org Subject: svn commit: r276343 - in projects/clang350-import: cddl/contrib/opensolaris/lib/libdtrace/common contrib/bsnmp/lib lib/libc/tests/hash lib/ncurses libexec/rtld-elf/powerpc share/man/man7 share/mk s... Message-ID: <201412282002.sBSK2627048119@svn.freebsd.org>
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Author: dim Date: Sun Dec 28 20:02:06 2014 New Revision: 276343 URL: https://svnweb.freebsd.org/changeset/base/276343 Log: Merge ^/head r274961 through r276342. Added: projects/clang350-import/sys/arm/arm/cpu_asm-v6.S - copied unchanged from r276342, head/sys/arm/arm/cpu_asm-v6.S projects/clang350-import/sys/arm/arm/cpuinfo.c - copied unchanged from r276342, head/sys/arm/arm/cpuinfo.c projects/clang350-import/sys/arm/include/cpu-v6.h - copied unchanged from r276342, head/sys/arm/include/cpu-v6.h projects/clang350-import/sys/arm/include/cpuinfo.h - copied unchanged from r276342, head/sys/arm/include/cpuinfo.h Deleted: projects/clang350-import/sys/contrib/dev/iwn/iwlwifi-6000g2a-17.168.5.2.fw.uu projects/clang350-import/sys/contrib/dev/iwn/iwlwifi-6000g2b-17.168.5.2.fw.uu Modified: projects/clang350-import/cddl/contrib/opensolaris/lib/libdtrace/common/dt_link.c projects/clang350-import/contrib/bsnmp/lib/snmpcrypto.c projects/clang350-import/lib/libc/tests/hash/Makefile projects/clang350-import/lib/ncurses/Makefile projects/clang350-import/libexec/rtld-elf/powerpc/reloc.c projects/clang350-import/share/man/man7/build.7 projects/clang350-import/share/mk/bsd.progs.mk projects/clang350-import/share/mk/src.libnames.mk projects/clang350-import/sys/amd64/ia32/ia32_sigtramp.S projects/clang350-import/sys/amd64/ia32/ia32_syscall.c projects/clang350-import/sys/amd64/vmm/io/vatpic.c projects/clang350-import/sys/arm/arm/machdep.c projects/clang350-import/sys/arm/broadcom/bcm2835/bcm2835_bsc.c projects/clang350-import/sys/arm/broadcom/bcm2835/bcm2835_bscvar.h projects/clang350-import/sys/arm/broadcom/bcm2835/bcm2835_mbox.c projects/clang350-import/sys/arm/include/cpufunc.h projects/clang350-import/sys/arm/ti/ti_gpio.c projects/clang350-import/sys/arm/ti/ti_i2c.c projects/clang350-import/sys/boot/common/loader.8 projects/clang350-import/sys/conf/files projects/clang350-import/sys/conf/files.arm projects/clang350-import/sys/dev/bce/if_bcefw.h projects/clang350-import/sys/dev/usb/controller/xhci.h projects/clang350-import/sys/dev/usb/controller/xhci_pci.c projects/clang350-import/sys/kern/kern_sysctl.c projects/clang350-import/sys/modules/dtrace/dtraceall/dtraceall.c Directory Properties: projects/clang350-import/ (props changed) projects/clang350-import/cddl/ (props changed) projects/clang350-import/cddl/contrib/opensolaris/ (props changed) projects/clang350-import/lib/libc/ (props changed) projects/clang350-import/share/ (props changed) projects/clang350-import/sys/ (props changed) projects/clang350-import/sys/amd64/vmm/ (props changed) projects/clang350-import/sys/boot/ (props changed) projects/clang350-import/sys/conf/ (props changed) Modified: projects/clang350-import/cddl/contrib/opensolaris/lib/libdtrace/common/dt_link.c ============================================================================== --- projects/clang350-import/cddl/contrib/opensolaris/lib/libdtrace/common/dt_link.c Sun Dec 28 19:55:44 2014 (r276342) +++ projects/clang350-import/cddl/contrib/opensolaris/lib/libdtrace/common/dt_link.c Sun Dec 28 20:02:06 2014 (r276343) @@ -685,8 +685,8 @@ dump_elf64(dtrace_hdl_t *dtp, const dof_ elf_file.ehdr.e_machine = EM_ARM; #elif defined(__mips__) elf_file.ehdr.e_machine = EM_MIPS; -#elif defined(__powerpc__) - elf_file.ehdr.e_machine = EM_PPC; +#elif defined(__powerpc64__) + elf_file.ehdr.e_machine = EM_PPC64; #elif defined(__sparc) elf_file.ehdr.e_machine = EM_SPARCV9; #elif defined(__i386) || defined(__amd64) @@ -784,21 +784,32 @@ dump_elf64(dtrace_hdl_t *dtp, const dof_ static int dt_symtab_lookup(Elf_Data *data_sym, int nsym, uintptr_t addr, uint_t shn, - GElf_Sym *sym) + GElf_Sym *sym, int uses_funcdesc, Elf *elf) { int i, ret = -1; + Elf64_Addr symval; + Elf_Scn *opd_scn; + Elf_Data *opd_desc; GElf_Sym s; for (i = 0; i < nsym && gelf_getsym(data_sym, i, sym) != NULL; i++) { - if (GELF_ST_TYPE(sym->st_info) == STT_FUNC && - shn == sym->st_shndx && - sym->st_value <= addr && - addr < sym->st_value + sym->st_size) { - if (GELF_ST_BIND(sym->st_info) == STB_GLOBAL) - return (0); + if (GELF_ST_TYPE(sym->st_info) == STT_FUNC) { + symval = sym->st_value; + if (uses_funcdesc) { + opd_scn = elf_getscn(elf, sym->st_shndx); + opd_desc = elf_rawdata(opd_scn, NULL); + symval = + *(uint64_t*)((char *)opd_desc->d_buf + symval); + } + if ((uses_funcdesc || shn == sym->st_shndx) && + symval <= addr && + addr < symval + sym->st_size) { + if (GELF_ST_BIND(sym->st_info) == STB_GLOBAL) + return (0); - ret = 0; - s = *sym; + ret = 0; + s = *sym; + } } } @@ -1375,7 +1386,8 @@ process_obj(dtrace_hdl_t *dtp, const cha continue; if (dt_symtab_lookup(data_sym, isym, rela.r_offset, - shdr_rel.sh_info, &fsym) != 0) { + shdr_rel.sh_info, &fsym, + (emachine1 == EM_PPC64), elf) != 0) { dt_strtab_destroy(strtab); goto err; } @@ -1536,7 +1548,8 @@ process_obj(dtrace_hdl_t *dtp, const cha p = strhyphenate(p + 3); /* strlen("___") */ if (dt_symtab_lookup(data_sym, isym, rela.r_offset, - shdr_rel.sh_info, &fsym) != 0) + shdr_rel.sh_info, &fsym, + (emachine1 == EM_PPC64), elf) != 0) goto err; if (fsym.st_name > data_str->d_size) Modified: projects/clang350-import/contrib/bsnmp/lib/snmpcrypto.c ============================================================================== --- projects/clang350-import/contrib/bsnmp/lib/snmpcrypto.c Sun Dec 28 19:55:44 2014 (r276342) +++ projects/clang350-import/contrib/bsnmp/lib/snmpcrypto.c Sun Dec 28 20:02:06 2014 (r276343) @@ -366,7 +366,7 @@ snmp_pdu_decrypt(const struct snmp_pdu * return (SNMP_CODE_OK); } -int +enum snmp_code snmp_passwd_to_keys(struct snmp_user *user, char *passwd __unused) { if (user->auth_proto == SNMP_AUTH_NOAUTH && @@ -378,7 +378,7 @@ snmp_passwd_to_keys(struct snmp_user *us return (SNMP_CODE_FAILED); } -int +enum snmp_code snmp_get_local_keys(struct snmp_user *user, uint8_t *eid __unused, uint32_t elen __unused) { Modified: projects/clang350-import/lib/libc/tests/hash/Makefile ============================================================================== --- projects/clang350-import/lib/libc/tests/hash/Makefile Sun Dec 28 19:55:44 2014 (r276342) +++ projects/clang350-import/lib/libc/tests/hash/Makefile Sun Dec 28 20:02:06 2014 (r276343) @@ -1,8 +1,14 @@ # $FreeBSD$ +.include <src.opts.mk> + TESTSDIR= ${TESTSBASE}/lib/libc/hash -NETBSD_ATF_TESTS_C= sha2_test +NETBSD_ATF_TESTS_C= + +.if ${MK_OPENSSL} != "no" +NETBSD_ATF_TESTS_C+= sha2_test +.endif NETBSD_ATF_TESTS_SH= hash_test Modified: projects/clang350-import/lib/ncurses/Makefile ============================================================================== --- projects/clang350-import/lib/ncurses/Makefile Sun Dec 28 19:55:44 2014 (r276342) +++ projects/clang350-import/lib/ncurses/Makefile Sun Dec 28 20:02:06 2014 (r276343) @@ -3,4 +3,11 @@ SUBDIR= ncurses form menu panel \ ncursesw formw menuw panelw +SUBDIR_PARALLEL= + +.for subdir in ${SUBDIR:Nncurses*:N*w} +SUBDIR_DEPEND_${subdir}= ncurses +SUBDIR_DEPEND_${subdir}w= ncursesw +.endfor + .include <bsd.subdir.mk> Modified: projects/clang350-import/libexec/rtld-elf/powerpc/reloc.c ============================================================================== --- projects/clang350-import/libexec/rtld-elf/powerpc/reloc.c Sun Dec 28 19:55:44 2014 (r276342) +++ projects/clang350-import/libexec/rtld-elf/powerpc/reloc.c Sun Dec 28 20:02:06 2014 (r276343) @@ -483,7 +483,7 @@ reloc_jmpslot(Elf_Addr *wherep, Elf_Addr */ offset = target - (Elf_Addr)wherep; - if (abs(offset) < 32*1024*1024) { /* inside 32MB? */ + if (abs((int)offset) < 32*1024*1024) { /* inside 32MB? */ /* b value # branch directly */ *wherep = 0x48000000 | (offset & 0x03fffffc); __syncicache(wherep, 4); Modified: projects/clang350-import/share/man/man7/build.7 ============================================================================== --- projects/clang350-import/share/man/man7/build.7 Sun Dec 28 19:55:44 2014 (r276342) +++ projects/clang350-import/share/man/man7/build.7 Sun Dec 28 20:02:06 2014 (r276343) @@ -24,7 +24,7 @@ .\" .\" $FreeBSD$ .\" -.Dd June 25, 2014 +.Dd December 18, 2014 .Dt BUILD 7 .Os .Sh NAME Modified: projects/clang350-import/share/mk/bsd.progs.mk ============================================================================== --- projects/clang350-import/share/mk/bsd.progs.mk Sun Dec 28 19:55:44 2014 (r276342) +++ projects/clang350-import/share/mk/bsd.progs.mk Sun Dec 28 20:02:06 2014 (r276343) @@ -43,7 +43,7 @@ PROG ?= $t .if defined(PROG) # just one of many PROG_OVERRIDE_VARS += BINDIR DPSRCS MAN SRCS -PROG_VARS += CFLAGS CPPFLAGS CXXFLAGS DPADD DPLIBS LDADD LDFLAGS ${PROG_OVERRIDE_VARS} +PROG_VARS += CFLAGS CPPFLAGS CXXFLAGS DPADD DPLIBS LDADD LIBADD LDFLAGS ${PROG_OVERRIDE_VARS} .for v in ${PROG_VARS:O:u} .if empty(${PROG_OVERRIDE_VARS:M$v}) .if defined(${v}.${PROG}) Modified: projects/clang350-import/share/mk/src.libnames.mk ============================================================================== --- projects/clang350-import/share/mk/src.libnames.mk Sun Dec 28 19:55:44 2014 (r276342) +++ projects/clang350-import/share/mk/src.libnames.mk Sun Dec 28 20:02:06 2014 (r276343) @@ -110,6 +110,7 @@ _LIBRARIES= \ memstat \ mp \ nandfs \ + ncurses \ ncursesw \ netgraph \ ngatm \ Modified: projects/clang350-import/sys/amd64/ia32/ia32_sigtramp.S ============================================================================== --- projects/clang350-import/sys/amd64/ia32/ia32_sigtramp.S Sun Dec 28 19:55:44 2014 (r276342) +++ projects/clang350-import/sys/amd64/ia32/ia32_sigtramp.S Sun Dec 28 20:02:06 2014 (r276343) @@ -86,34 +86,14 @@ ia32_osigcode: * executed, we would have a window where the ring 0 code is * executed with the wrong gsbase. * - * Instead, reflect the lcall $7,$0 back to ring 3 trampoline - * which sets up the frame for int $0x80. + * Instead, set LDT descriptor 0 as code segment, which reflects + * the lcall $7,$0 back to ring 3 trampoline. The trampoline sets up + * the frame for int $0x80. */ ALIGN_TEXT lcall_tramp: - .code64 - /* - * There, we are in 64bit mode and need to return to 32bit. - * First, convert call frame from 64 to 32 bit format. - */ - pushq %rax - movl 16(%rsp),%eax - movl %eax,20(%rsp) /* ret %cs */ - movl 8(%rsp),%eax - movl %eax,16(%rsp) /* ret %rip -> %eip */ - popq %rax - addq $8,%rsp - /* Now return to 32bit */ - pushq $0x33 /* _ucode32sel UPL */ - callq 1f -1: - addq $2f-1b,(%rsp) - lretq -2: - /* Back in 32bit mode */ - .code32 cmpl $SYS_vfork,%eax - je 4f + je 1f pushl %ebp movl %esp,%ebp pushl 0x24(%ebp) /* arg 6 */ @@ -122,21 +102,20 @@ lcall_tramp: pushl 0x18(%ebp) pushl 0x14(%ebp) pushl 0x10(%ebp) /* arg 1 */ - pushl 0xc(%ebp) /* gap */ + subl $4,%esp /* gap */ int $0x80 leavel -3: lretl -4: +1: /* * vfork handling is special and relies on the libc stub saving - * the return ip in %ecx. If vfork failed, then there is no - * child which can corrupt the frame created by call gate. + * the return ip in %ecx. Also, we assume that the call was done + * with ucode32 selector in %cs. */ int $0x80 - jb 3b - addl $8,%esp - jmpl *%ecx + movl $0x33,4(%esp) /* GUCODE32_SEL | SEL_UPL */ + movl %ecx,(%esp) + lretl #endif ALIGN_TEXT Modified: projects/clang350-import/sys/amd64/ia32/ia32_syscall.c ============================================================================== --- projects/clang350-import/sys/amd64/ia32/ia32_syscall.c Sun Dec 28 19:55:44 2014 (r276342) +++ projects/clang350-import/sys/amd64/ia32/ia32_syscall.c Sun Dec 28 20:02:06 2014 (r276343) @@ -223,39 +223,28 @@ int setup_lcall_gate(void) { struct i386_ldt_args uap; - struct user_segment_descriptor descs[2]; - struct gate_descriptor *ssd; + struct user_segment_descriptor desc; uint32_t lcall_addr; int error; bzero(&uap, sizeof(uap)); uap.start = 0; - uap.num = 2; - - /* - * This is the easiest way to cut the space for system - * descriptor in ldt. Manually adjust the descriptor type to - * the call gate later. - */ - bzero(&descs[0], sizeof(descs)); - descs[0].sd_type = SDT_SYSNULL; - descs[1].sd_type = SDT_SYSNULL; - error = amd64_set_ldt(curthread, &uap, descs); + uap.num = 1; + lcall_addr = curproc->p_sysent->sv_psstrings - sz_lcall_tramp; + bzero(&desc, sizeof(desc)); + desc.sd_type = SDT_MEMERA; + desc.sd_dpl = SEL_UPL; + desc.sd_p = 1; + desc.sd_def32 = 1; + desc.sd_gran = 1; + desc.sd_lolimit = 0xffff; + desc.sd_hilimit = 0xf; + desc.sd_lobase = lcall_addr; + desc.sd_hibase = lcall_addr >> 24; + error = amd64_set_ldt(curthread, &uap, &desc); if (error != 0) return (error); - lcall_addr = curproc->p_sysent->sv_psstrings - sz_lcall_tramp; - mtx_lock(&dt_lock); - ssd = (struct gate_descriptor *)(curproc->p_md.md_ldt->ldt_base); - bzero(ssd, sizeof(*ssd)); - ssd->gd_looffset = lcall_addr; - ssd->gd_hioffset = lcall_addr >> 16; - ssd->gd_selector = _ucodesel; - ssd->gd_type = SDT_SYSCGT; - ssd->gd_dpl = SEL_UPL; - ssd->gd_p = 1; - mtx_unlock(&dt_lock); - return (0); } #endif Modified: projects/clang350-import/sys/amd64/vmm/io/vatpic.c ============================================================================== --- projects/clang350-import/sys/amd64/vmm/io/vatpic.c Sun Dec 28 19:55:44 2014 (r276342) +++ projects/clang350-import/sys/amd64/vmm/io/vatpic.c Sun Dec 28 20:02:06 2014 (r276343) @@ -73,6 +73,7 @@ struct atpic { uint8_t request; /* Interrupt Request Register (IIR) */ uint8_t service; /* Interrupt Service (ISR) */ uint8_t mask; /* Interrupt Mask Register (IMR) */ + uint8_t smm; /* special mask mode */ int acnt[8]; /* sum of pin asserts and deasserts */ int lowprio; /* lowest priority irq */ @@ -131,8 +132,16 @@ vatpic_get_highest_isrpin(struct atpic * ATPIC_PIN_FOREACH(pin, atpic, i) { bit = (1 << pin); - if (atpic->service & bit) - return (pin); + if (atpic->service & bit) { + /* + * An IS bit that is masked by an IMR bit will not be + * cleared by a non-specific EOI in Special Mask Mode. + */ + if (atpic->smm && (atpic->mask & bit) != 0) + continue; + else + return (pin); + } } return (-1); @@ -153,6 +162,15 @@ vatpic_get_highest_irrpin(struct atpic * if (atpic->sfn) serviced &= ~(1 << 2); + /* + * In 'Special Mask Mode', when a mask bit is set in OCW1 it inhibits + * further interrupts at that level and enables interrupts from all + * other levels that are not masked. In other words the ISR has no + * bearing on the levels that can generate interrupts. + */ + if (atpic->smm) + serviced = 0; + ATPIC_PIN_FOREACH(pin, atpic, tmp) { bit = 1 << pin; @@ -261,6 +279,7 @@ vatpic_icw1(struct vatpic *vatpic, struc atpic->lowprio = 7; atpic->rd_cmd_reg = 0; atpic->poll = 0; + atpic->smm = 0; if ((val & ICW1_SNGL) != 0) { VATPIC_CTR0(vatpic, "vatpic cascade mode required"); @@ -375,8 +394,10 @@ vatpic_ocw3(struct vatpic *vatpic, struc VATPIC_CTR1(vatpic, "atpic ocw3 0x%x", val); if (val & OCW3_ESMM) { - VATPIC_CTR0(vatpic, "atpic special mask mode not implemented"); - return (-1); + atpic->smm = val & OCW3_SMM ? 1 : 0; + VATPIC_CTR2(vatpic, "%s atpic special mask mode %s", + master_atpic(vatpic, atpic) ? "master" : "slave", + atpic->smm ? "enabled" : "disabled"); } if (val & OCW3_RR) { Copied: projects/clang350-import/sys/arm/arm/cpu_asm-v6.S (from r276342, head/sys/arm/arm/cpu_asm-v6.S) ============================================================================== --- /dev/null 00:00:00 1970 (empty, because file is newly added) +++ projects/clang350-import/sys/arm/arm/cpu_asm-v6.S Sun Dec 28 20:02:06 2014 (r276343, copy of r276342, head/sys/arm/arm/cpu_asm-v6.S) @@ -0,0 +1,200 @@ +/*- + * Copyright 2014 Svatopluk Kraus <onwahe@gmail.com> + * Copyright 2014 Michal Meloun <meloun@miracle.cz> + * All rights reserved. + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions + * are met: + * 1. Redistributions of source code must retain the above copyright + * notice, this list of conditions and the following disclaimer. + * 2. Redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in the + * documentation and/or other materials provided with the distribution. + * + * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND + * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE + * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE + * ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE + * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL + * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS + * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) + * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT + * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY + * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF + * SUCH DAMAGE. + * + * $FreeBSD$ + */ + +#include <machine/acle-compat.h> +#include <machine/asm.h> +#include <machine/asmacros.h> +#include <machine/armreg.h> +#include <machine/sysreg.h> + +#if __ARM_ARCH >= 7 + +/* + * Define cache functions used by startup code, which counts on the fact that + * only r0-r4,r12 (ip) are modified and no stack space is used. This set + * of function must be called with interrupts disabled and don't follow + * ARM ABI (cannot be called form C code. + * Moreover, it works only with caches integrated to CPU (accessible via CP15). + */ + +/* Invalidate D cache to PoC. (aka all cache levels)*/ +ASENTRY(dcache_inv_poc_all) + mrc CP15_CLIDR(r0) + ands r0, r0, #0x07000000 + mov r0, r0, lsr #23 /* Get LoC (naturally aligned) */ + beq 4f + +1: mcr CP15_CSSELR(r0) /* set cache level */ + isb + mrc CP15_CCSIDR(r0) /* read CCSIDR */ + + ubfx r2, r0, #13, #15 /* get num sets - 1 from CCSIDR */ + ubfx r3, r0, #3, #10 /* get num ways - 1 from CCSIDR */ + clz r1, r3 /* number of bits to MSB of way */ + lsl r3, r3, r1 /* shift into position */ + mov ip, #1 + lsl ip, ip, r1 /* ip now contains the way decr */ + + ubfx r0, r0, #0, #3 /* get linesize from CCSIDR */ + add r0, r0, #4 /* apply bias */ + lsl r2, r2, r0 /* shift sets by log2(linesize) */ + add r3, r3, r2 /* merge numsets - 1 with numways - 1 */ + sub ip, ip, r2 /* subtract numsets - 1 from way decr */ + mov r1, #1 + lsl r1, r1, r0 /* r1 now contains the set decr */ + mov r2, ip /* r2 now contains set way decr */ + + /* r3 = ways/sets, r2 = way decr, r1 = set decr, r0 and ip are free */ +2: mcr CP15_DCISW(r3) /* invalidate line */ + movs r0, r3 /* get current way/set */ + beq 3f /* at 0 means we are done */ + movs r0, r0, lsl #10 /* clear way bits leaving only set bits*/ + subne r3, r3, r1 /* non-zero?, decrement set */ + subeq r3, r3, r2 /* zero?, decrement way and restore set count */ + b 2b + +3: + mrc CP15_CSSELR(r0) /* get cache level */ + add r0, r0, #2 /* next level */ + mrc CP15_CLIDR(r1) + ands r1, r1, #0x07000000 + mov r1, r1, lsr #23 /* Get LoC (naturally aligned) */ + cmp r1, r0 + bgt 1b + +4: dsb /* wait for stores to finish */ + mov r0, #0 + mcr CP15_CSSELR(r0) + isb + bx lr +END(dcache_inv_poc_all) + +/* Invalidate D cache to PoU. (aka L1 cache only)*/ +ASENTRY(dcache_inv_pou_all) + mrc CP15_CLIDR(r0) + ands r0, r0, #0x07000000 + mov r0, r0, lsr #26 /* Get LoUU (naturally aligned) */ + beq 4f + +1: mcr CP15_CSSELR(r0) /* set cache level */ + isb + mrc CP15_CCSIDR(r0) /* read CCSIDR */ + + ubfx r2, r0, #13, #15 /* get num sets - 1 from CCSIDR */ + ubfx r3, r0, #3, #10 /* get num ways - 1 from CCSIDR */ + clz r1, r3 /* number of bits to MSB of way */ + lsl r3, r3, r1 /* shift into position */ + mov ip, #1 + lsl ip, ip, r1 /* ip now contains the way decr */ + + ubfx r0, r0, #0, #3 /* get linesize from CCSIDR */ + add r0, r0, #4 /* apply bias */ + lsl r2, r2, r0 /* shift sets by log2(linesize) */ + add r3, r3, r2 /* merge numsets - 1 with numways - 1 */ + sub ip, ip, r2 /* subtract numsets - 1 from way decr */ + mov r1, #1 + lsl r1, r1, r0 /* r1 now contains the set decr */ + mov r2, ip /* r2 now contains set way decr */ + + /* r3 = ways/sets, r2 = way decr, r1 = set decr, r0 and ip are free */ +2: mcr CP15_DCISW(r3) /* clean & invalidate line */ + movs r0, r3 /* get current way/set */ + beq 3f /* at 0 means we are done */ + movs r0, r0, lsl #10 /* clear way bits leaving only set bits*/ + subne r3, r3, r1 /* non-zero?, decrement set */ + subeq r3, r3, r2 /* zero?, decrement way and restore set count */ + b 2b + +3: + mrc CP15_CSSELR(r0) /* get cache level */ + add r0, r0, #2 /* next level */ + mrc CP15_CLIDR(r1) + ands r1, r1, #0x07000000 + mov r1, r1, lsr #26 /* Get LoUU (naturally aligned) */ + cmp r1, r0 + bgt 1b + +4: dsb /* wait for stores to finish */ + mov r0, #0 + mcr CP15_CSSELR(r0) + bx lr +END(dcache_inv_pou_all) + +/* Write back and Invalidate D cache to PoC. */ +ASENTRY(dcache_wbinv_poc_all) + mrc CP15_CLIDR(r0) + ands r0, r0, #0x07000000 + mov r0, r0, lsr #23 /* Get LoC (naturally aligned) */ + beq 4f + +1: mcr CP15_CSSELR(r0) /* set cache level */ + isb + mrc CP15_CCSIDR(r0) /* read CCSIDR */ + + ubfx r2, r0, #13, #15 /* get num sets - 1 from CCSIDR */ + ubfx r3, r0, #3, #10 /* get num ways - 1 from CCSIDR */ + clz r1, r3 /* number of bits to MSB of way */ + lsl r3, r3, r1 /* shift into position */ + mov ip, #1 + lsl ip, ip, r1 /* ip now contains the way decr */ + + ubfx r0, r0, #0, #3 /* get linesize from CCSIDR */ + add r0, r0, #4 /* apply bias */ + lsl r2, r2, r0 /* shift sets by log2(linesize) */ + add r3, r3, r2 /* merge numsets - 1 with numways - 1 */ + sub ip, ip, r2 /* subtract numsets - 1 from way decr */ + mov r1, #1 + lsl r1, r1, r0 /* r1 now contains the set decr */ + mov r2, ip /* r2 now contains set way decr */ + + /* r3 = ways/sets, r2 = way decr, r1 = set decr, r0 and ip are free */ +2: mcr CP15_DCCISW(r3) /* clean & invalidate line */ + movs r0, r3 /* get current way/set */ + beq 3f /* at 0 means we are done */ + movs r0, r0, lsl #10 /* clear way bits leaving only set bits*/ + subne r3, r3, r1 /* non-zero?, decrement set */ + subeq r3, r3, r2 /* zero?, decrement way and restore set count */ + b 2b + +3: + mrc CP15_CSSELR(r0) /* get cache level */ + add r0, r0, #2 /* next level */ + mrc CP15_CLIDR(r1) + ands r1, r1, #0x07000000 + mov r1, r1, lsr #23 /* Get LoC (naturally aligned) */ + cmp r1, r0 + bgt 1b + +4: dsb /* wait for stores to finish */ + mov r0, #0 + mcr CP15_CSSELR(r0) + bx lr +END(dcache_wbinv_poc_all) + +#endif /* __ARM_ARCH >= 7 */ Copied: projects/clang350-import/sys/arm/arm/cpuinfo.c (from r276342, head/sys/arm/arm/cpuinfo.c) ============================================================================== --- /dev/null 00:00:00 1970 (empty, because file is newly added) +++ projects/clang350-import/sys/arm/arm/cpuinfo.c Sun Dec 28 20:02:06 2014 (r276343, copy of r276342, head/sys/arm/arm/cpuinfo.c) @@ -0,0 +1,121 @@ +/*- + * Copyright 2014 Svatopluk Kraus <onwahe@gmail.com> + * Copyright 2014 Michal Meloun <meloun@miracle.cz> + * All rights reserved. + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions + * are met: + * 1. Redistributions of source code must retain the above copyright + * notice, this list of conditions and the following disclaimer. + * 2. Redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in the + * documentation and/or other materials provided with the distribution. + * + * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND + * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE + * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE + * ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE + * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL + * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS + * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) + * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT + * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY + * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF + * SUCH DAMAGE. + */ + +#include <sys/cdefs.h> +__FBSDID("$FreeBSD$"); + +#include <sys/param.h> +#include <sys/systm.h> + +#include <machine/cpuinfo.h> +#include <machine/cpu-v6.h> + +struct cpuinfo cpuinfo; + +/* Read and parse CPU id scheme */ +void +cpuinfo_init(void) +{ + + cpuinfo.midr = cp15_midr_get(); + /* Test old version id schemes first */ + if ((cpuinfo.midr & CPU_ID_IMPLEMENTOR_MASK) == CPU_ID_ARM_LTD) { + if (CPU_ID_ISOLD(cpuinfo.midr)) { + /* obsolete ARMv2 or ARMv3 CPU */ + cpuinfo.midr = 0; + return; + } + if (CPU_ID_IS7(cpuinfo.midr)) { + if ((cpuinfo.midr & (1 << 23)) == 0) { + /* obsolete ARMv3 CPU */ + cpuinfo.midr = 0; + return; + } + /* ARMv4T CPU */ + cpuinfo.architecture = 1; + cpuinfo.revision = (cpuinfo.midr >> 16) & 0x7F; + } + } else { + /* must be new id scheme */ + cpuinfo.architecture = (cpuinfo.midr >> 16) & 0x0F; + cpuinfo.revision = (cpuinfo.midr >> 20) & 0x0F; + } + /* Parse rest of MIDR */ + cpuinfo.implementer = (cpuinfo.midr >> 24) & 0xFF; + cpuinfo.part_number = (cpuinfo.midr >> 4) & 0xFFF; + cpuinfo.patch = cpuinfo.midr & 0x0F; + + /* CP15 c0,c0 regs 0-7 exist on all CPUs (although aliased with MIDR) */ + cpuinfo.ctr = cp15_ctr_get(); + cpuinfo.tcmtr = cp15_tcmtr_get(); + cpuinfo.tlbtr = cp15_tlbtr_get(); + cpuinfo.mpidr = cp15_mpidr_get(); + cpuinfo.revidr = cp15_revidr_get(); + + /* if CPU is not v7 cpu id scheme */ + if (cpuinfo.architecture != 0xF) + return; + + cpuinfo.id_pfr0 = cp15_id_pfr0_get(); + cpuinfo.id_pfr1 = cp15_id_pfr1_get(); + cpuinfo.id_dfr0 = cp15_id_dfr0_get(); + cpuinfo.id_afr0 = cp15_id_afr0_get(); + cpuinfo.id_mmfr0 = cp15_id_mmfr0_get(); + cpuinfo.id_mmfr1 = cp15_id_mmfr1_get(); + cpuinfo.id_mmfr2 = cp15_id_mmfr2_get(); + cpuinfo.id_mmfr3 = cp15_id_mmfr3_get(); + cpuinfo.id_isar0 = cp15_id_isar0_get(); + cpuinfo.id_isar1 = cp15_id_isar1_get(); + cpuinfo.id_isar2 = cp15_id_isar2_get(); + cpuinfo.id_isar3 = cp15_id_isar3_get(); + cpuinfo.id_isar4 = cp15_id_isar4_get(); + cpuinfo.id_isar5 = cp15_id_isar5_get(); + +/* Not yet - CBAR only exist on ARM SMP Cortex A CPUs + cpuinfo.cbar = cp15_cbar_get(); +*/ + + /* Test if revidr is implemented */ + if (cpuinfo.revidr == cpuinfo.midr) + cpuinfo.revidr = 0; + + /* parsed bits of above registers */ + /* id_mmfr0 */ + cpuinfo.outermost_shareability = (cpuinfo.id_mmfr0 >> 8) & 0xF; + cpuinfo.shareability_levels = (cpuinfo.id_mmfr0 >> 12) & 0xF; + cpuinfo.auxiliary_registers = (cpuinfo.id_mmfr0 >> 20) & 0xF; + cpuinfo.innermost_shareability = (cpuinfo.id_mmfr0 >> 28) & 0xF; + /* id_mmfr2 */ + cpuinfo.mem_barrier = (cpuinfo.id_mmfr2 >> 20) & 0xF; + /* id_mmfr3 */ + cpuinfo.coherent_walk = (cpuinfo.id_mmfr3 >> 20) & 0xF; + cpuinfo.maintenance_broadcast =(cpuinfo.id_mmfr3 >> 12) & 0xF; + /* id_pfr1 */ + cpuinfo.generic_timer_ext = (cpuinfo.id_pfr1 >> 16) & 0xF; + cpuinfo.virtualization_ext = (cpuinfo.id_pfr1 >> 12) & 0xF; + cpuinfo.security_ext = (cpuinfo.id_pfr1 >> 4) & 0xF; +} Modified: projects/clang350-import/sys/arm/arm/machdep.c ============================================================================== --- projects/clang350-import/sys/arm/arm/machdep.c Sun Dec 28 19:55:44 2014 (r276342) +++ projects/clang350-import/sys/arm/arm/machdep.c Sun Dec 28 20:02:06 2014 (r276343) @@ -90,6 +90,7 @@ __FBSDID("$FreeBSD$"); #include <machine/armreg.h> #include <machine/atags.h> #include <machine/cpu.h> +#include <machine/cpuinfo.h> #include <machine/devmap.h> #include <machine/frame.h> #include <machine/intr.h> @@ -1064,6 +1065,8 @@ initarm(struct arm_boot_params *abp) arm_physmem_kernaddr = abp->abp_physaddr; memsize = 0; + + cpuinfo_init(); set_cpufuncs(); /* Modified: projects/clang350-import/sys/arm/broadcom/bcm2835/bcm2835_bsc.c ============================================================================== --- projects/clang350-import/sys/arm/broadcom/bcm2835/bcm2835_bsc.c Sun Dec 28 19:55:44 2014 (r276342) +++ projects/clang350-import/sys/arm/broadcom/bcm2835/bcm2835_bsc.c Sun Dec 28 20:02:06 2014 (r276343) @@ -53,6 +53,7 @@ __FBSDID("$FreeBSD$"); #include "iicbus_if.h" static void bcm_bsc_intr(void *); +static int bcm_bsc_detach(device_t); static void bcm_bsc_modifyreg(struct bcm_bsc_softc *sc, uint32_t off, uint32_t mask, @@ -72,10 +73,8 @@ bcm_bsc_clock_proc(SYSCTL_HANDLER_ARGS) { struct bcm_bsc_softc *sc; uint32_t clk; - int error; sc = (struct bcm_bsc_softc *)arg1; - BCM_BSC_LOCK(sc); clk = BCM_BSC_READ(sc, BCM_BSC_CLOCK); BCM_BSC_UNLOCK(sc); @@ -83,20 +82,8 @@ bcm_bsc_clock_proc(SYSCTL_HANDLER_ARGS) if (clk == 0) clk = 32768; clk = BCM_BSC_CORE_CLK / clk; - error = sysctl_handle_int(oidp, &clk, sizeof(clk), req); - if (error != 0 || req->newptr == NULL) - return (error); - clk = BCM_BSC_CORE_CLK / clk; - if (clk % 2) - clk--; - if (clk > 0xffff) - clk = 0xffff; - BCM_BSC_LOCK(sc); - BCM_BSC_WRITE(sc, BCM_BSC_CLOCK, clk); - BCM_BSC_UNLOCK(sc); - - return (0); + return (sysctl_handle_int(oidp, &clk, 0, req)); } static int @@ -192,7 +179,7 @@ bcm_bsc_sysctl_init(struct bcm_bsc_softc ctx = device_get_sysctl_ctx(sc->sc_dev); tree_node = device_get_sysctl_tree(sc->sc_dev); tree = SYSCTL_CHILDREN(tree_node); - SYSCTL_ADD_PROC(ctx, tree, OID_AUTO, "clock", + SYSCTL_ADD_PROC(ctx, tree, OID_AUTO, "frequency", CTLFLAG_RW | CTLTYPE_UINT, sc, sizeof(*sc), bcm_bsc_clock_proc, "IU", "I2C BUS clock frequency"); SYSCTL_ADD_PROC(ctx, tree, OID_AUTO, "clock_stretch", @@ -307,7 +294,11 @@ bcm_bsc_attach(device_t dev) bcm_bsc_reset(sc); BCM_BSC_UNLOCK(sc); - device_add_child(dev, "iicbus", -1); + sc->sc_iicbus = device_add_child(dev, "iicbus", -1); + if (sc->sc_iicbus == NULL) { + bcm_bsc_detach(dev); + return (ENXIO); + } return (bus_generic_attach(dev)); } @@ -462,29 +453,16 @@ static int bcm_bsc_iicbus_reset(device_t dev, u_char speed, u_char addr, u_char *oldaddr) { struct bcm_bsc_softc *sc; - uint32_t freq; - + uint32_t busfreq; + sc = device_get_softc(dev); BCM_BSC_LOCK(sc); bcm_bsc_reset(sc); - freq = 0; - switch (speed) { - case IIC_SLOW: - freq = BCM_BSC_SLOW; - break; - case IIC_FAST: - freq = BCM_BSC_FAST; - break; - case IIC_FASTEST: - freq = BCM_BSC_FASTEST; - break; - case IIC_UNKNOWN: - default: - /* Reuse last frequency. */ - break; - } - if (freq != 0) - BCM_BSC_WRITE(sc, BCM_BSC_CLOCK, BCM_BSC_CORE_CLK / freq); + if (sc->sc_iicbus == NULL) + busfreq = 100000; + else + busfreq = IICBUS_GET_FREQUENCY(sc->sc_iicbus, speed); + BCM_BSC_WRITE(sc, BCM_BSC_CLOCK, BCM_BSC_CORE_CLK / busfreq); BCM_BSC_UNLOCK(sc); return (IIC_ENOADDR); Modified: projects/clang350-import/sys/arm/broadcom/bcm2835/bcm2835_bscvar.h ============================================================================== --- projects/clang350-import/sys/arm/broadcom/bcm2835/bcm2835_bscvar.h Sun Dec 28 19:55:44 2014 (r276342) +++ projects/clang350-import/sys/arm/broadcom/bcm2835/bcm2835_bscvar.h Sun Dec 28 20:02:06 2014 (r276343) @@ -41,6 +41,7 @@ struct { struct bcm_bsc_softc { device_t sc_dev; + device_t sc_iicbus; struct mtx sc_mtx; struct resource * sc_mem_res; struct resource * sc_irq_res; @@ -56,10 +57,6 @@ struct bcm_bsc_softc { #define BCM_I2C_READ 0x02 #define BCM_I2C_ERROR 0x04 -#define BCM_BSC_SLOW 10000 /* 10 kHz. */ -#define BCM_BSC_FAST 50000 /* 50 kHz. */ -#define BCM_BSC_FASTEST 100000 /* 100 kHz. */ - #define BCM_BSC_WRITE(_sc, _off, _val) \ bus_space_write_4(_sc->sc_bst, _sc->sc_bsh, _off, _val) #define BCM_BSC_READ(_sc, _off) \ Modified: projects/clang350-import/sys/arm/broadcom/bcm2835/bcm2835_mbox.c ============================================================================== --- projects/clang350-import/sys/arm/broadcom/bcm2835/bcm2835_mbox.c Sun Dec 28 19:55:44 2014 (r276342) +++ projects/clang350-import/sys/arm/broadcom/bcm2835/bcm2835_mbox.c Sun Dec 28 20:02:06 2014 (r276343) @@ -31,25 +31,16 @@ __FBSDID("$FreeBSD$"); #include <sys/systm.h> #include <sys/bus.h> #include <sys/kernel.h> +#include <sys/lock.h> #include <sys/module.h> -#include <sys/malloc.h> +#include <sys/mutex.h> #include <sys/rman.h> #include <sys/sema.h> -#include <sys/timeet.h> -#include <sys/timetc.h> -#include <sys/watchdog.h> #include <machine/bus.h> -#include <machine/cpu.h> -#include <machine/intr.h> -#include <dev/fdt/fdt_common.h> -#include <dev/ofw/openfirm.h> #include <dev/ofw/ofw_bus.h> #include <dev/ofw/ofw_bus_subr.h> -#include <machine/bus.h> -#include <machine/fdt.h> - #include <arm/broadcom/bcm2835/bcm2835_mbox.h> #include "mbox_if.h" @@ -188,25 +179,21 @@ bcm_mbox_attach(device_t dev) static int bcm_mbox_write(device_t dev, int chan, uint32_t data) { - int limit = 20000; + int limit = 1000; struct bcm_mbox_softc *sc = device_get_softc(dev); dprintf("bcm_mbox_write: chan %d, data %08x\n", chan, data); MBOX_LOCK(sc); - - while ((mbox_read_4(sc, REG_STATUS) & STATUS_FULL) && limit--) { - DELAY(2); - } - + while ((mbox_read_4(sc, REG_STATUS) & STATUS_FULL) && --limit) + DELAY(5); if (limit == 0) { printf("bcm_mbox_write: STATUS_FULL stuck"); MBOX_UNLOCK(sc); return (EAGAIN); } - mbox_write_4(sc, REG_WRITE, MBOX_MSG(chan, data)); - MBOX_UNLOCK(sc); + return (0); } @@ -254,4 +241,3 @@ static driver_t bcm_mbox_driver = { static devclass_t bcm_mbox_devclass; DRIVER_MODULE(mbox, simplebus, bcm_mbox_driver, bcm_mbox_devclass, 0, 0); - Copied: projects/clang350-import/sys/arm/include/cpu-v6.h (from r276342, head/sys/arm/include/cpu-v6.h) ============================================================================== --- /dev/null 00:00:00 1970 (empty, because file is newly added) +++ projects/clang350-import/sys/arm/include/cpu-v6.h Sun Dec 28 20:02:06 2014 (r276343, copy of r276342, head/sys/arm/include/cpu-v6.h) @@ -0,0 +1,396 @@ +/*- + * Copyright 2014 Svatopluk Kraus <onwahe@gmail.com> + * Copyright 2014 Michal Meloun <meloun@miracle.cz> + * All rights reserved. + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions + * are met: + * 1. Redistributions of source code must retain the above copyright + * notice, this list of conditions and the following disclaimer. + * 2. Redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in the + * documentation and/or other materials provided with the distribution. + * + * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND + * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE + * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE + * ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE + * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL + * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS + * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) + * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT + * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY + * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF + * SUCH DAMAGE. + * + * $FreeBSD$ + */ +#ifndef MACHINE_CPU_V6_H +#define MACHINE_CPU_V6_H + +#include "machine/atomic.h" +#include "machine/cpufunc.h" +#include "machine/cpuinfo.h" +#include "machine/sysreg.h" + + +#define CPU_ASID_KERNEL 0 + +/* + * Macros to generate CP15 (system control processor) read/write functions. + */ +#define _FX(s...) #s + +#define _RF0(fname, aname...) \ +static __inline register_t \ +fname(void) \ +{ \ + register_t reg; \ + __asm __volatile("mrc\t" _FX(aname): "=r" (reg)); \ + return(reg); \ +} + +#define _WF0(fname, aname...) \ +static __inline void \ +fname(void) \ +{ \ + __asm __volatile("mcr\t" _FX(aname)); \ +} + +#define _WF1(fname, aname...) \ +static __inline void \ +fname(register_t reg) \ +{ \ + __asm __volatile("mcr\t" _FX(aname):: "r" (reg)); \ +} + +/* + * Raw CP15 maintenance operations + * !!! not for external use !!! + */ + +/* TLB */ + +_WF0(_CP15_TLBIALL, CP15_TLBIALL) /* Invalidate entire unified TLB */ +#if __ARM_ARCH >= 7 && defined SMP +_WF0(_CP15_TLBIALLIS, CP15_TLBIALLIS) /* Invalidate entire unified TLB IS */ +#endif +_WF1(_CP15_TLBIASID, CP15_TLBIASID(%0)) /* Invalidate unified TLB by ASID */ +#if __ARM_ARCH >= 7 && defined SMP +_WF1(_CP15_TLBIASIDIS, CP15_TLBIASIDIS(%0)) /* Invalidate unified TLB by ASID IS */ +#endif +_WF1(_CP15_TLBIMVAA, CP15_TLBIMVAA(%0)) /* Invalidate unified TLB by MVA, all ASID */ +#if __ARM_ARCH >= 7 && defined SMP +_WF1(_CP15_TLBIMVAAIS, CP15_TLBIMVAAIS(%0)) /* Invalidate unified TLB by MVA, all ASID IS */ +#endif +_WF1(_CP15_TLBIMVA, CP15_TLBIMVA(%0)) /* Invalidate unified TLB by MVA */ + +_WF1(_CP15_TTB_SET, CP15_TTBR0(%0)) + +/* Cache and Branch predictor */ + +_WF0(_CP15_BPIALL, CP15_BPIALL) /* Branch predictor invalidate all */ +#if __ARM_ARCH >= 7 && defined SMP +_WF0(_CP15_BPIALLIS, CP15_BPIALLIS) /* Branch predictor invalidate all IS */ +#endif +_WF1(_CP15_BPIMVA, CP15_BPIMVA(%0)) /* Branch predictor invalidate by MVA */ +_WF1(_CP15_DCCIMVAC, CP15_DCCIMVAC(%0)) /* Data cache clean and invalidate by MVA PoC */ +_WF1(_CP15_DCCISW, CP15_DCCISW(%0)) /* Data cache clean and invalidate by set/way */ +_WF1(_CP15_DCCMVAC, CP15_DCCMVAC(%0)) /* Data cache clean by MVA PoC */ +#if __ARM_ARCH >= 7 *** DIFF OUTPUT TRUNCATED AT 1000 LINES ***
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