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Date:      Tue, 06 Nov 2007 02:02:50 -0800
From:      Maxim Sobolev <sobomax@FreeBSD.org>
To:        Maxim Sobolev <sobomax@FreeBSD.org>
Cc:        freebsd-current@FreeBSD.org, Rui Paulo <rpaulo@FreeBSD.org>, freebsd-i386@FreeBSD.org
Subject:   Re: MacBook users: possible fix for the SMP problem
Message-ID:  <47303BCA.3010805@FreeBSD.org>
In-Reply-To: <472FA3B1.1070902@FreeBSD.org>
References:  <e1309ba60711041553l211b9f60r9191eaf461866e76@mail.gmail.com> <472FA3B1.1070902@FreeBSD.org>

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By the way, it seems that you don't need this patch for the amd64 kernel 
- 1st gen MacBooks don't have 64-bit mode, while 2nd gens don't have 
this problem. I've just checked - the stock 7.0-BETA2 AMd64 kernel boots 
just fine into SMP mode on my new Core 2 Duo based MacBook.

-Maxim

Maxim Sobolev wrote:
> I've just tested it on my 1st gen MacBook Pro. Yes, indeed, it solves 
> both problems - one with CPU frequency detection and another one with 
> the AP startup. Thanks!
> 
> -Maxim
> 
> Rui Paulo wrote:
>> Hi,
>> I've been contacted by Marco Trillo and I think he has found the
>> source of the SMP problem.
>> The problem seems to rely on Intel ICH7. Basically we need to disable
>> the "LEGACY_USB" bit before we calibrate the clocks.
>> "LEGACY_USB", according to Marco (I don't have the ICH7 spec at hand),
>> "causes legacy USB circuit to generate SMIs".
>>
>> Please try the following patch:
>> --- sys/amd64/isa/clock.c.orig    2007-11-04 20:31:09.000000000 +0000
>> +++ sys/amd64/isa/clock.c    2007-11-04 20:34:59.000000000 +0000
>> @@ -577,6 +577,8 @@ startrtclock()
>>       writertc(RTC_STATUSA, rtc_statusa);
>>       writertc(RTC_STATUSB, RTCSB_24HR);
>>
>> +    outl(0x430, inl(0x430) & ~0x8);
>> +
>>       freq = calibrate_clocks();
>>   #ifdef CLK_CALIBRATION_LOOP
>>       if (bootverbose) {
>> --- sys/i386/isa/clock.c.orig    2007-11-04 20:34:03.000000000 +0000
>> +++ sys/i386/isa/clock.c    2007-11-04 20:34:30.000000000 +0000
>> @@ -621,6 +621,8 @@ startrtclock()
>>       writertc(RTC_STATUSA, rtc_statusa);
>>       writertc(RTC_STATUSB, RTCSB_24HR);
>>
>> +    outl(0x430, inl(0x430) & ~0x8);
>> +
>>       freq = calibrate_clocks();
>>   #ifdef CLK_CALIBRATION_LOOP
>>       if (bootverbose) {
>>
>>
>> This should probably fix two issues:
>> 1) The second core should start without any trick (e.g. key press)
>> 2) We should be able to run with HZ=1000 (the default) without any
>> problem. To check if this is indeed the case, try booting with HZ=1000
>> (loader.conf variable kern.hz) and check if your CPU clock shows up
>> correctly in the dmesg. After that, please also check if 'time sleep
>> 1' takes one second (not more and not less).
>>
>> Also, please test if there are any USB problems.
>>
>> Note: this is still a hack. I'm still thinking about a way to
>> correctly identify on which systems we need to apply this fix.
>>
>> Regards.
>>
> 
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