Skip site navigation (1)Skip section navigation (2)
Date:      Tue, 31 Mar 2009 01:59:47 +0000 (UTC)
From:      Warner Losh <imp@FreeBSD.org>
To:        src-committers@freebsd.org, svn-src-all@freebsd.org, svn-src-head@freebsd.org
Subject:   svn commit: r190583 - head/sys/dev/ed
Message-ID:  <200903310159.n2V1xlEZ084402@svn.freebsd.org>

next in thread | raw e-mail | index | archive | help
Author: imp
Date: Tue Mar 31 01:59:47 2009
New Revision: 190583
URL: http://svn.freebsd.org/changeset/base/190583

Log:
  Hmmmm...  This can't be right...  But it looks like the DL100xx chips
  don't have one of the clock cycles (the turn cycle) that the AX88x90
  chips have.  Make this conditional.  But this seems totally crazy and
  can't possibly be right.  Commit the fix for the moment until I can
  explore this mystery more deeply.
  
  On the plus side, the DL10022-based cards I have (D-Link DEF-670TXD
  and SMC8040TX) work after this fix.

Modified:
  head/sys/dev/ed/if_ed_pccard.c

Modified: head/sys/dev/ed/if_ed_pccard.c
==============================================================================
--- head/sys/dev/ed/if_ed_pccard.c	Tue Mar 31 01:01:01 2009	(r190582)
+++ head/sys/dev/ed/if_ed_pccard.c	Tue Mar 31 01:59:47 2009	(r190583)
@@ -1115,7 +1115,9 @@ ed_miibus_readreg(device_t dev, int phy,
 	(*sc->mii_writebits)(sc, ED_MII_READOP, ED_MII_OP_BITS);
 	(*sc->mii_writebits)(sc, phy, ED_MII_PHY_BITS);
 	(*sc->mii_writebits)(sc, reg, ED_MII_REG_BITS);
-	(*sc->mii_readbits)(sc, ED_MII_ACK_BITS);
+	if (sc->chip_type == ED_CHIP_TYPE_AX88790 ||
+	    sc->chip_type == ED_CHIP_TYPE_AX88190)
+		(*sc->mii_readbits)(sc, ED_MII_ACK_BITS);
 	failed = (*sc->mii_readbits)(sc, ED_MII_ACK_BITS);
 	val = (*sc->mii_readbits)(sc, ED_MII_DATA_BITS);
 	(*sc->mii_writebits)(sc, ED_MII_IDLE, ED_MII_IDLE_BITS);



Want to link to this message? Use this URL: <https://mail-archive.FreeBSD.org/cgi/mid.cgi?200903310159.n2V1xlEZ084402>