Date: Sat, 27 Feb 2010 03:55:08 +0000 (UTC) From: Juli Mallett <jmallett@FreeBSD.org> To: src-committers@freebsd.org, svn-src-user@freebsd.org Subject: svn commit: r204393 - user/jmallett/octeon/sys/mips/cavium Message-ID: <201002270355.o1R3t8UV044631@svn.freebsd.org>
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Author: jmallett Date: Sat Feb 27 03:55:08 2010 New Revision: 204393 URL: http://svn.freebsd.org/changeset/base/204393 Log: Use the elaborate address loading in n32, not o32. n32 doesn't have 64-bit pointers so we need to load a 64-bit address into a temporary register and use that in the ld or sd instruction. Modified: user/jmallett/octeon/sys/mips/cavium/octeon_pcmap_regs.h Modified: user/jmallett/octeon/sys/mips/cavium/octeon_pcmap_regs.h ============================================================================== --- user/jmallett/octeon/sys/mips/cavium/octeon_pcmap_regs.h Sat Feb 27 03:47:22 2010 (r204392) +++ user/jmallett/octeon/sys/mips/cavium/octeon_pcmap_regs.h Sat Feb 27 03:55:08 2010 (r204393) @@ -90,7 +90,7 @@ extern struct pcpu *cpuid_to_pcpu[]; #define OCTEON_SYNCW __asm __volatile (".word 0x10f" : : ) #define OCTEON_SYNCWS __asm __volatile (".word 0x14f" : : ) -#if defined(__mips_n32) || defined(__mips_n64) +#if defined(__mips_n64) static inline void oct_write64 (uint64_t csr_addr, uint64_t val64) { @@ -158,7 +158,7 @@ static inline int32_t oct_readint32 (uin -#else +#elif defined(__mips_n32) /* @@ -169,9 +169,6 @@ static inline int32_t oct_readint32 (uin * but is quite ugly. */ -/* ABI o32 */ - - /* * Read/write functions */
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