Date: Mon, 3 Jul 2017 20:47:32 +0000 (UTC) From: Marius Strobl <marius@FreeBSD.org> To: src-committers@freebsd.org, svn-src-all@freebsd.org, svn-src-head@freebsd.org Subject: svn commit: r320620 - head/sys/dev/sdhci Message-ID: <201707032047.v63KlWSF098981@repo.freebsd.org>
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Author: marius Date: Mon Jul 3 20:47:32 2017 New Revision: 320620 URL: https://svnweb.freebsd.org/changeset/base/320620 Log: Correct a typo in the comment part of r320577, later on copied into the commit message; as actually implemented, the intent is to retry up to 2 ms for controllers to enable bus power. Noticed by: ian@, rgrimes@ Additional note: Among others, the problem addressed by r320577 is the APL32 ("Storage Controllers May Not Be Power Gated") erratum. Hopefully, along with r318282, r320577 works around the remaining problems seen with Intel Apollo Lake eMMC and SDXC controllers. Modified: head/sys/dev/sdhci/sdhci.c Modified: head/sys/dev/sdhci/sdhci.c ============================================================================== --- head/sys/dev/sdhci/sdhci.c Mon Jul 3 20:44:01 2017 (r320619) +++ head/sys/dev/sdhci/sdhci.c Mon Jul 3 20:47:32 2017 (r320620) @@ -398,7 +398,7 @@ sdhci_set_power(struct sdhci_slot *slot, u_char power) /* * Turn on VDD1 power. Note that at least some Intel controllers can * fail to enable bus power on the first try after transiting from D3 - * to D0, so we give them up to 20 ms. + * to D0, so we give them up to 2 ms. */ pwr |= SDHCI_POWER_ON; for (i = 0; i < 20; i++) {
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