Date: Mon, 16 Jun 2014 09:28:53 +0200 From: Michael Tuexen <tuexen@freebsd.org> To: Mark R V Murray <markm@FreeBSD.org> Cc: Hans Petter Selasky <hps@selasky.org>, svn-src-head@freebsd.org, svn-src-all@freebsd.org, src-committers@freebsd.org Subject: Re: svn commit: r266083 - in head/sys/arm: arm include Message-ID: <3664DBD3-7CEA-43E8-9757-E835BB21FE9E@freebsd.org> In-Reply-To: <3841D090-5973-40B0-B61C-F15E8C1978C9@FreeBSD.org> References: <201405141911.s4EJBFZZ097826@svn.freebsd.org> <537D0952.2040001@selasky.org> <7610C8E6-3F01-4317-BC1A-67645A162CD7@FreeBSD.org> <53871493.2010502@selasky.org> <EE7E19AA-BE18-4740-A636-4DA3023A5392@FreeBSD.org> <9412A358-EBCB-4A5A-B728-2A15C50FC217@fh-muenster.de> <D118F546-0F32-429F-86F2-69BEE0EC2D2F@FreeBSD.org> <CC36082E-1DFD-4576-9653-970F93A3699C@fh-muenster.de> <FD5DF228-1B2B-48F9-8445-54BF5959FEDA@FreeBSD.org> <9B438991-C970-46A7-8116-A490E02D7139@fh-muenster.de> <3841D090-5973-40B0-B61C-F15E8C1978C9@FreeBSD.org>
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On 15 Jun 2014, at 17:13, Mark R V Murray <markm@FreeBSD.org> wrote:
>=20
> On 30 May 2014, at 09:42, Michael Tuexen <tuexen@fh-muenster.de> =
wrote:
>=20
>> On 29 May 2014, at 21:21, Mark R V Murray <markm@FreeBSD.org> wrote:
>>=20
>>>=20
>>> On 29 May 2014, at 19:27, Michael Tuexen <tuexen@fh-muenster.de> =
wrote:
>>>=20
>>>> On 29 May 2014, at 20:15, Mark R V Murray <markm@FreeBSD.org> =
wrote:
>>>>=20
>>>>>=20
>>>>> On 29 May 2014, at 19:13, Michael Tuexen <tuexen@fh-muenster.de> =
wrote:
>>>>>=20
>>>>>>> I can make it work on RPI, but trying to find what else it =
will/won=92t work on is more problematic.
>>>>>> Wouldn't it require to use different registers on the RPI? This =
would mean you
>>>>>> would need more #ifdefs=85
>>>>>=20
>>>>> Thats the problem; too many #ifdefs.
>>>> So you could just keep the code for now, but reduce the #ifdefs to =
the ones you
>>>> know that work. Later on, you can replace it by the driver stuff=85
>>>=20
>>> That=92s what I was thinking, yes.
>> Great. Let me know if you need testing support on the RPI=85
>=20
> I=92ve come to the conclusion that my RPI-B is hosed. It doesn=92t =
even boot Raspian properly. Sorry about how long this has taken.
>=20
> Please could someone with a working RPI please check that the =
following patch works (may need to apply by hand due to cut/paste).
Hi Mark,
your patch for accessing the value is correct. However, the =
initialisation code also
needs to be adopted to the platform. So in addition to your patch, you =
also need:
Index: arm/cpufunc.c
=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=
=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=
=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D
--- arm/cpufunc.c (revision 267519)
+++ arm/cpufunc.c (working copy)
@@ -1415,6 +1415,12 @@
:
: "r"(0x00000001));
#endif
+#if defined(CPU_ARM1136) || defined(CPU_ARM1176)
+ /* Set PMCR[2,0] to enable counters and reset CCNT */
+ __asm volatile ("mcr p15, 0, %0, c15, c12, 0\n\t"
+ :
+ : "r"(0x00000005));
+#else
/* Set up the PMCCNTR register as a cyclecounter:
* Set PMINTENCLR to 0xFFFFFFFF to block interrupts
* Set PMCR[2,0] to enable counters and reset CCNT
@@ -1426,6 +1432,7 @@
: "r"(0xFFFFFFFF),
"r"(0x00000005),
"r"(0x80000000));
+#endif
}
#endif
=20
With both patches, the RPI boots up fine with r267519
Is there an easy test to see if the code actually works as expected and =
not that it just
allows the system to boot?
Regarding the 32-bit limitation: Do we want to increment the register =
only every
64 clock cycle?
Best regards
Michael
>=20
> Thanks, with repeated apologies.
>=20
> M
> --=20
> Mark R V Murray
>=20
> --- include/cpu.h (revision 267507)
> +++ include/cpu.h (working copy)
> @@ -25,7 +25,16 @@
> * Read PMCCNTR. Curses! Its only 32 bits.
> * TODO: Fix this by catching overflow with interrupt?
> */
> +/* The ARMv6 vs ARMv7 divide is going to need a better way of
> + * distinguishing between them.
> + */
> +#if defined(CPU_ARM1136) || defined(CPU_ARM1176)
> + /* ARMv6 - Earlier model SCCs */
> + __asm __volatile("mrc p15, 0, %0, c15, c12, 1": "=3Dr" (ccnt));
> +#else
> + /* ARMv7 - Later model SCCs */
> __asm __volatile("mrc p15, 0, %0, c9, c13, 0": "=3Dr" (ccnt));
> +#endif
> ccnt64 =3D (uint64_t)ccnt;
> return (ccnt64);
> #else /* No performance counters, so use binuptime(9). This is =
slooooow */
>=20
>=20
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