Date: Sun, 02 Nov 1997 14:40:45 -0600 From: dkelly@hiwaay.net To: "Jamil J. Weatherbee" <jamil@trojanhorse.ml.org> Cc: =?iso-8859-1?Q?=DEor=F0ur?= Ivarsson <totii@est.is>, hackers@FreeBSD.ORG Subject: Re: 7400 gates effected by probe routine Message-ID: <199711022040.OAA19944@nospam.hiwaay.net> In-Reply-To: Message from "Jamil J. Weatherbee" <jamil@trojanhorse.ml.org> of "Sat, 01 Nov 1997 20:57:03 PST." <Pine.BSF.3.96.971101205441.671A-100000@trojanhorse.ml.org>
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> > Ah... Thanks, What your'e talking about a 7401 (open collector nor) or a > 7405 (open collector nand) (TTL Cookbook pg. 137), unfortunately I don't > have a choice with this > so I probably will just forget the probe routines. Was wondering what kind of designer would tie the outputs of (2) TTL 7400 gates together. Now as I understand it, the output gates that are tied together are OC. So what are you worried about? This is what God made OC parts for. OC outputs never source current, they only sink it. To make the circuit work you need a pull up resistor. This resistor, not the number of other OC outputs on the circuit, determines how much current your OC "output" has to sink if it wants the circuit "low". With 74HCxx, a 100k pullup resistor might be usable for very low current. A 470 ohm pullup may be the practical lower limit for a plain old 74xx. The really high resistance values will swtich slower, depends on how much capacitance you have. I usually use 4.7k pullups on HC parts. Combining OC outputs on a ciruit results in an inverted-OR. If any one gate decides the line should be low, it will be. This is most often seen in CPU reset circuits, and IRQ buses. -- David Kelly N4HHE, dkelly@hiwaay.net ===================================================================== The human mind ordinarily operates at only ten percent of its capacity -- the rest is overhead for the operating system.
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