Date: Thu, 20 Nov 1997 03:26:42 GMT From: mouth@ibm.net (John Kelly) To: Bruce Evans <bde@zeta.org.au> Cc: hackers@freebsd.org Subject: Re: Status of 650 UART support Message-ID: <3474ab40.2923767@smtp-gw01.ny.us.ibm.net> In-Reply-To: <199711150553.QAA31140@godzilla.zeta.org.au> References: <199711150553.QAA31140@godzilla.zeta.org.au>
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On Sat, 15 Nov 1997 16:53:53 +1100, Bruce Evans <bde@zeta.org.au> wrote: >is approximately 8 ports saturated with 32 bytes of input, 32 bytes >of output and a modem status change. This takes about 2*32 + 1*32 + 5 >i/o's per port. Each i/o takes about 1 usec on an 8MHz ISA bus (perhaps >125 nsec more or less). Altogether, it takes about 8*101 = 808. usec. >Altogether, with saturated input and no output it takes at least about >8*37 = 296 usec. Where you say 2*32 + 1*32 +5, I thought you meant two I/O for each input byte and one I/O for each output byte. But later you say 37 (32 + 5) I/O for saturated input, which would mean only one I/O for each input byte, so now I wonder if you meant the opposite -- two I/O for each output byte and one I/O for each input byte. But that doesn't sound right -- don't I need to read bit 0 of the line status register before trying to read a byte from the receiver FIFO, so that I'll know when I've emptied the receiver FIFO? That would give two I/O per input byte. John
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