Date: Thu, 16 Oct 2008 13:39:10 GMT From: Marko Zec <zec@FreeBSD.org> To: Perforce Change Reviews <perforce@freebsd.org> Subject: PERFORCE change 151455 for review Message-ID: <200810161339.m9GDdAYb041206@repoman.freebsd.org>
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http://perforce.freebsd.org/chv.cgi?CH=151455 Change 151455 by zec@zec_tpx32 on 2008/10/16 13:38:41 IFC @ 151449 Affected files ... .. //depot/projects/vimage/src/sys/amd64/linux32/linux.h#6 integrate .. //depot/projects/vimage/src/sys/arm/arm/busdma_machdep.c#10 integrate .. //depot/projects/vimage/src/sys/arm/arm/cpufunc.c#7 integrate .. //depot/projects/vimage/src/sys/arm/arm/cpufunc_asm_feroceon.S#1 branch .. //depot/projects/vimage/src/sys/arm/arm/elf_machdep.c#4 integrate .. //depot/projects/vimage/src/sys/arm/arm/elf_trampoline.c#6 integrate .. //depot/projects/vimage/src/sys/arm/arm/genassym.c#6 integrate .. //depot/projects/vimage/src/sys/arm/arm/identcpu.c#5 integrate .. //depot/projects/vimage/src/sys/arm/arm/locore.S#6 integrate .. //depot/projects/vimage/src/sys/arm/arm/pmap.c#15 integrate .. //depot/projects/vimage/src/sys/arm/arm/swtch.S#6 integrate .. //depot/projects/vimage/src/sys/arm/conf/DB-78XXX#1 branch .. //depot/projects/vimage/src/sys/arm/conf/DB-88F5XXX#1 branch .. //depot/projects/vimage/src/sys/arm/conf/DB-88F6XXX#1 branch .. //depot/projects/vimage/src/sys/arm/include/armreg.h#4 integrate .. //depot/projects/vimage/src/sys/arm/include/bootinfo.h#1 branch .. //depot/projects/vimage/src/sys/arm/include/cpufunc.h#5 integrate .. //depot/projects/vimage/src/sys/arm/include/intr.h#7 integrate .. //depot/projects/vimage/src/sys/arm/include/metadata.h#2 integrate .. //depot/projects/vimage/src/sys/arm/include/resource.h#2 integrate .. //depot/projects/vimage/src/sys/arm/mv/bus_space.c#1 branch .. //depot/projects/vimage/src/sys/arm/mv/common.c#1 branch .. //depot/projects/vimage/src/sys/arm/mv/discovery/db78xxx.c#1 branch .. //depot/projects/vimage/src/sys/arm/mv/discovery/discovery.c#1 branch .. //depot/projects/vimage/src/sys/arm/mv/discovery/files.db78xxx#1 branch .. //depot/projects/vimage/src/sys/arm/mv/discovery/std.db78xxx#1 branch .. //depot/projects/vimage/src/sys/arm/mv/files.mv#1 branch .. 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//depot/projects/vimage/src/sys/boot/ofw/libofw/ofw_disk.c#2 integrate .. //depot/projects/vimage/src/sys/boot/powerpc/Makefile#4 integrate .. //depot/projects/vimage/src/sys/boot/powerpc/boot1.chrp/Makefile#1 branch .. //depot/projects/vimage/src/sys/boot/powerpc/boot1.chrp/Makefile.hfs#1 branch .. //depot/projects/vimage/src/sys/boot/powerpc/boot1.chrp/boot1.c#1 branch .. //depot/projects/vimage/src/sys/boot/powerpc/boot1.chrp/bootinfo.txt#1 branch .. //depot/projects/vimage/src/sys/boot/powerpc/boot1.chrp/generate-hfs.sh#1 branch .. //depot/projects/vimage/src/sys/boot/powerpc/boot1.chrp/hfs.tmpl.bz2.uu#1 branch .. //depot/projects/vimage/src/sys/boot/uboot/lib/glue.c#5 integrate .. //depot/projects/vimage/src/sys/cddl/contrib/opensolaris/uts/common/fs/zfs/zfs_znode.c#4 integrate .. //depot/projects/vimage/src/sys/compat/linux/linux_futex.c#6 integrate .. //depot/projects/vimage/src/sys/compat/linux/linux_futex.h#5 integrate .. //depot/projects/vimage/src/sys/conf/Makefile.arm#7 integrate .. //depot/projects/vimage/src/sys/conf/NOTES#33 integrate .. //depot/projects/vimage/src/sys/conf/files#39 integrate .. //depot/projects/vimage/src/sys/conf/files.powerpc#13 integrate .. //depot/projects/vimage/src/sys/conf/ldscript.mips.cfe#2 integrate .. //depot/projects/vimage/src/sys/conf/options.arm#7 integrate .. //depot/projects/vimage/src/sys/dev/ata/ata-all.c#9 integrate .. //depot/projects/vimage/src/sys/dev/ata/ata-all.h#9 integrate .. //depot/projects/vimage/src/sys/dev/ata/ata-chipset.c#20 delete .. //depot/projects/vimage/src/sys/dev/ata/ata-dma.c#7 integrate .. //depot/projects/vimage/src/sys/dev/ata/ata-pci.c#7 integrate .. //depot/projects/vimage/src/sys/dev/ata/ata-pci.h#15 integrate .. //depot/projects/vimage/src/sys/dev/ata/ata-sata.c#1 branch .. //depot/projects/vimage/src/sys/dev/ata/chipsets/ata-acard.c#1 branch .. //depot/projects/vimage/src/sys/dev/ata/chipsets/ata-acerlabs.c#1 branch .. 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//depot/projects/vimage/src/sys/dev/drm/drm_agpsupport.c#6 integrate .. //depot/projects/vimage/src/sys/dev/drm/drm_auth.c#4 integrate .. //depot/projects/vimage/src/sys/dev/drm/drm_bufs.c#5 integrate .. //depot/projects/vimage/src/sys/dev/drm/drm_context.c#4 integrate .. //depot/projects/vimage/src/sys/dev/drm/drm_dma.c#4 integrate .. //depot/projects/vimage/src/sys/dev/drm/drm_drawable.c#4 integrate .. //depot/projects/vimage/src/sys/dev/drm/drm_drv.c#7 integrate .. //depot/projects/vimage/src/sys/dev/drm/drm_fops.c#5 integrate .. //depot/projects/vimage/src/sys/dev/drm/drm_ioctl.c#4 integrate .. //depot/projects/vimage/src/sys/dev/drm/drm_irq.c#5 integrate .. //depot/projects/vimage/src/sys/dev/drm/drm_linux_list.h#2 integrate .. //depot/projects/vimage/src/sys/dev/drm/drm_memory.c#4 integrate .. //depot/projects/vimage/src/sys/dev/drm/drm_pci.c#5 integrate .. //depot/projects/vimage/src/sys/dev/drm/drm_pciids.h#5 integrate .. //depot/projects/vimage/src/sys/dev/drm/drm_scatter.c#4 integrate .. //depot/projects/vimage/src/sys/dev/drm/drm_sysctl.c#4 integrate .. //depot/projects/vimage/src/sys/dev/drm/i915_drv.c#4 integrate .. //depot/projects/vimage/src/sys/dev/drm/i915_irq.c#4 integrate .. //depot/projects/vimage/src/sys/dev/drm/mach64_drv.c#4 integrate .. //depot/projects/vimage/src/sys/dev/drm/mga_drv.c#4 integrate .. //depot/projects/vimage/src/sys/dev/drm/r128_drv.c#4 integrate .. //depot/projects/vimage/src/sys/dev/drm/radeon_cp.c#4 integrate .. //depot/projects/vimage/src/sys/dev/drm/radeon_drv.c#4 integrate .. //depot/projects/vimage/src/sys/dev/drm/radeon_drv.h#3 integrate .. //depot/projects/vimage/src/sys/dev/drm/savage_drv.c#4 integrate .. //depot/projects/vimage/src/sys/dev/drm/sis_drv.c#4 integrate .. //depot/projects/vimage/src/sys/dev/drm/tdfx_drv.c#4 integrate .. //depot/projects/vimage/src/sys/dev/hwpmc/hwpmc_ppro.c#4 integrate .. //depot/projects/vimage/src/sys/dev/hwpmc/pmc_events.h#5 integrate .. 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integrate .. //depot/projects/vimage/src/sys/nfsclient/nfs_bio.c#9 integrate .. //depot/projects/vimage/src/sys/nfsserver/nfs_serv.c#10 integrate .. //depot/projects/vimage/src/sys/powerpc/aim/nexus.c#3 integrate .. //depot/projects/vimage/src/sys/powerpc/aim/ofw_machdep.c#3 integrate .. //depot/projects/vimage/src/sys/powerpc/include/nexusvar.h#2 delete .. //depot/projects/vimage/src/sys/powerpc/ofw/ofw_pci.c#2 delete .. //depot/projects/vimage/src/sys/powerpc/ofw/ofw_pci.h#2 delete .. //depot/projects/vimage/src/sys/powerpc/ofw/ofw_pcib_pci.c#2 integrate .. //depot/projects/vimage/src/sys/powerpc/ofw/ofw_pcibus.c#1 branch .. //depot/projects/vimage/src/sys/powerpc/ofw/ofw_syscons.c#4 integrate .. //depot/projects/vimage/src/sys/powerpc/powermac/ata_kauai.c#4 integrate .. //depot/projects/vimage/src/sys/powerpc/powermac/grackle.c#5 integrate .. //depot/projects/vimage/src/sys/powerpc/powermac/hrowpic.c#5 integrate .. //depot/projects/vimage/src/sys/powerpc/powermac/macio.c#5 integrate .. //depot/projects/vimage/src/sys/powerpc/powermac/openpic_macio.c#5 integrate .. //depot/projects/vimage/src/sys/powerpc/powermac/uninorth.c#6 integrate .. //depot/projects/vimage/src/sys/powerpc/powermac/uninorthvar.h#2 integrate .. //depot/projects/vimage/src/sys/powerpc/psim/iobus.c#3 integrate .. //depot/projects/vimage/src/sys/powerpc/psim/openpic_iobus.c#5 integrate .. //depot/projects/vimage/src/sys/sparc64/conf/GENERIC#15 integrate .. //depot/projects/vimage/src/sys/sys/bufobj.h#4 integrate .. //depot/projects/vimage/src/sys/sys/pmc.h#5 integrate .. //depot/projects/vimage/src/sys/sys/proc.h#23 integrate .. //depot/projects/vimage/src/sys/sys/tty.h#7 integrate .. //depot/projects/vimage/src/sys/sys/vnode.h#12 integrate .. //depot/projects/vimage/src/sys/ufs/ffs/ffs_inode.c#6 integrate .. //depot/projects/vimage/src/sys/ufs/ffs/ffs_snapshot.c#11 integrate .. //depot/projects/vimage/src/sys/ufs/ffs/ffs_vfsops.c#14 integrate .. //depot/projects/vimage/src/sys/vm/vm_object.c#17 integrate Differences ... ==== //depot/projects/vimage/src/sys/amd64/linux32/linux.h#6 (text+ko) ==== @@ -27,7 +27,7 @@ * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. * - * $FreeBSD: src/sys/amd64/linux32/linux.h,v 1.17 2008/04/08 09:45:47 kib Exp $ + * $FreeBSD: src/sys/amd64/linux32/linux.h,v 1.18 2008/10/14 07:59:23 kib Exp $ */ #ifndef _AMD64_LINUX_H_ @@ -880,4 +880,15 @@ (LINUX_CLONE_VM | LINUX_CLONE_FS | LINUX_CLONE_FILES | \ LINUX_CLONE_SIGHAND | LINUX_CLONE_THREAD) +/* robust futexes */ +struct linux_robust_list { + l_uintptr_t next; +}; + +struct linux_robust_list_head { + struct linux_robust_list list; + l_ulong futex_offset; + l_uintptr_t pending_list; +}; + #endif /* !_AMD64_LINUX_H_ */ ==== //depot/projects/vimage/src/sys/arm/arm/busdma_machdep.c#10 (text+ko) ==== @@ -29,7 +29,7 @@ */ #include <sys/cdefs.h> -__FBSDID("$FreeBSD: src/sys/arm/arm/busdma_machdep.c,v 1.38 2008/03/12 15:31:37 raj Exp $"); +__FBSDID("$FreeBSD: src/sys/arm/arm/busdma_machdep.c,v 1.39 2008/10/13 18:59:59 raj Exp $"); /* * ARM bus dma support routines @@ -629,6 +629,8 @@ newmap->allocbuffer = tmpaddr; cpu_idcache_wbinv_range((vm_offset_t)*vaddr, dmat->maxsize); + cpu_l2cache_wbinv_range((vm_offset_t)*vaddr, + dmat->maxsize); *vaddr = tmpaddr; } else newmap->origbuffer = newmap->allocbuffer = NULL; ==== //depot/projects/vimage/src/sys/arm/arm/cpufunc.c#7 (text+ko) ==== @@ -45,7 +45,7 @@ * Created : 30/01/97 */ #include <sys/cdefs.h> -__FBSDID("$FreeBSD: src/sys/arm/arm/cpufunc.c,v 1.22 2007/11/28 22:55:55 cognet Exp $"); +__FBSDID("$FreeBSD: src/sys/arm/arm/cpufunc.c,v 1.23 2008/10/13 18:16:54 raj Exp $"); #include <sys/param.h> #include <sys/systm.h> @@ -357,6 +357,66 @@ arm10_setup /* cpu setup */ }; + +struct cpu_functions feroceon_cpufuncs = { + /* CPU functions */ + + cpufunc_id, /* id */ + cpufunc_nullop, /* cpwait */ + + /* MMU functions */ + + cpufunc_control, /* control */ + cpufunc_domains, /* Domain */ + feroceon_setttb, /* Setttb */ + cpufunc_faultstatus, /* Faultstatus */ + cpufunc_faultaddress, /* Faultaddress */ + + /* TLB functions */ + + armv4_tlb_flushID, /* tlb_flushID */ + arm10_tlb_flushID_SE, /* tlb_flushID_SE */ + armv4_tlb_flushI, /* tlb_flushI */ + arm10_tlb_flushI_SE, /* tlb_flushI_SE */ + armv4_tlb_flushD, /* tlb_flushD */ + armv4_tlb_flushD_SE, /* tlb_flushD_SE */ + + /* Cache operations */ + + armv5_ec_icache_sync_all, /* icache_sync_all */ + armv5_ec_icache_sync_range, /* icache_sync_range */ + + armv5_ec_dcache_wbinv_all, /* dcache_wbinv_all */ + feroceon_dcache_wbinv_range, /* dcache_wbinv_range */ + feroceon_dcache_inv_range, /* dcache_inv_range */ + feroceon_dcache_wb_range, /* dcache_wb_range */ + + armv5_ec_idcache_wbinv_all, /* idcache_wbinv_all */ + feroceon_idcache_wbinv_range, /* idcache_wbinv_all */ + + feroceon_l2cache_wbinv_all, /* l2cache_wbinv_all */ + feroceon_l2cache_wbinv_range, /* l2cache_wbinv_range */ + feroceon_l2cache_inv_range, /* l2cache_inv_range */ + feroceon_l2cache_wb_range, /* l2cache_wb_range */ + + /* Other functions */ + + cpufunc_nullop, /* flush_prefetchbuf */ + armv4_drain_writebuf, /* drain_writebuf */ + cpufunc_nullop, /* flush_brnchtgt_C */ + (void *)cpufunc_nullop, /* flush_brnchtgt_E */ + + (void *)cpufunc_nullop, /* sleep */ + + /* Soft functions */ + + cpufunc_null_fixup, /* dataabt_fixup */ + cpufunc_null_fixup, /* prefetchabt_fixup */ + + arm10_context_switch, /* context_switch */ + + arm10_setup /* cpu setup */ +}; #endif /* CPU_ARM9E || CPU_ARM10 */ #ifdef CPU_ARM10 @@ -933,9 +993,36 @@ } #endif /* CPU_ARM9 */ #if defined(CPU_ARM9E) || defined(CPU_ARM10) - if (cputype == CPU_ID_ARM926EJS || - cputype == CPU_ID_ARM1026EJS) { - cpufuncs = armv5_ec_cpufuncs; + if (cputype == CPU_ID_ARM926EJS || cputype == CPU_ID_ARM1026EJS || + cputype == CPU_ID_MV88FR131 || cputype == CPU_ID_MV88FR571_VD || + cputype == CPU_ID_MV88FR571_41) { + if (cputype == CPU_ID_MV88FR131 || + cputype == CPU_ID_MV88FR571_VD || + cputype == CPU_ID_MV88FR571_41) { + + cpufuncs = feroceon_cpufuncs; + /* + * Workaround for Marvell MV78100 CPU: Cache prefetch + * mechanism may affect the cache coherency validity, + * so it needs to be disabled. + * + * Refer to errata document MV-S501058-00C.pdf (p. 3.1 + * L2 Prefetching Mechanism) for details. + */ + if (cputype == CPU_ID_MV88FR571_VD || + cputype == CPU_ID_MV88FR571_41) { + feroceon_control_ext(0xffffffff, + FC_DCACHE_STREAM_EN | FC_WR_ALLOC_EN | + FC_BRANCH_TARG_BUF_DIS | FC_L2CACHE_EN | + FC_L2_PREF_DIS); + } else { + feroceon_control_ext(0xffffffff, + FC_DCACHE_STREAM_EN | FC_WR_ALLOC_EN | + FC_BRANCH_TARG_BUF_DIS | FC_L2CACHE_EN); + } + } else + cpufuncs = armv5_ec_cpufuncs; + cpu_reset_needs_v4_MMU_disable = 1; /* V4 or higher */ get_cachetype_cp15(); pmap_pte_init_generic(); ==== //depot/projects/vimage/src/sys/arm/arm/elf_machdep.c#4 (text+ko) ==== @@ -24,7 +24,7 @@ */ #include <sys/cdefs.h> -__FBSDID("$FreeBSD: src/sys/arm/arm/elf_machdep.c,v 1.8 2008/09/24 10:14:37 kib Exp $"); +__FBSDID("$FreeBSD: src/sys/arm/arm/elf_machdep.c,v 1.9 2008/10/13 18:59:59 raj Exp $"); #include <sys/param.h> #include <sys/kernel.h> @@ -215,6 +215,7 @@ { cpu_idcache_wbinv_all(); + cpu_l2cache_wbinv_all(); cpu_tlb_flushID(); return (0); } ==== //depot/projects/vimage/src/sys/arm/arm/elf_trampoline.c#6 (text+ko) ==== @@ -23,7 +23,7 @@ */ #include <sys/cdefs.h> -__FBSDID("$FreeBSD: src/sys/arm/arm/elf_trampoline.c,v 1.21 2008/08/04 14:37:32 cognet Exp $"); +__FBSDID("$FreeBSD: src/sys/arm/arm/elf_trampoline.c,v 1.22 2008/10/13 20:07:13 raj Exp $"); #include <machine/asm.h> #include <sys/param.h> #include <sys/elf32.h> @@ -73,6 +73,8 @@ #endif #ifdef CPU_XSCALE_81342 #define cpu_l2cache_wbinv_all xscalec3_l2cache_purge +#elif defined(SOC_MV_KIRKWOOD) || defined(SOC_MV_DISCOVERY) +#define cpu_l2cache_wbinv_all feroceon_l2cache_wbinv_all #else #define cpu_l2cache_wbinv_all() #endif ==== //depot/projects/vimage/src/sys/arm/arm/genassym.c#6 (text+ko) ==== @@ -26,7 +26,7 @@ */ #include <sys/cdefs.h> -__FBSDID("$FreeBSD: src/sys/arm/arm/genassym.c,v 1.11 2008/02/05 10:22:33 raj Exp $"); +__FBSDID("$FreeBSD: src/sys/arm/arm/genassym.c,v 1.12 2008/10/13 18:59:59 raj Exp $"); #include <sys/param.h> #include <sys/systm.h> #include <sys/assym.h> @@ -79,7 +79,9 @@ ASSYM(CF_CONTROL, offsetof(struct cpu_functions, cf_control)); ASSYM(CF_CONTEXT_SWITCH, offsetof(struct cpu_functions, cf_context_switch)); ASSYM(CF_DCACHE_WB_RANGE, offsetof(struct cpu_functions, cf_dcache_wb_range)); +ASSYM(CF_L2CACHE_WB_RANGE, offsetof(struct cpu_functions, cf_l2cache_wb_range)); ASSYM(CF_IDCACHE_WBINV_ALL, offsetof(struct cpu_functions, cf_idcache_wbinv_all)); +ASSYM(CF_L2CACHE_WBINV_ALL, offsetof(struct cpu_functions, cf_l2cache_wbinv_all)); ASSYM(CF_TLB_FLUSHID_SE, offsetof(struct cpu_functions, cf_tlb_flushID_SE)); ASSYM(CF_ICACHE_SYNC, offsetof(struct cpu_functions, cf_icache_sync_all)); ==== //depot/projects/vimage/src/sys/arm/arm/identcpu.c#5 (text+ko) ==== @@ -42,7 +42,7 @@ */ #include <sys/cdefs.h> -__FBSDID("$FreeBSD: src/sys/arm/arm/identcpu.c,v 1.13 2008/05/23 04:03:53 alc Exp $"); +__FBSDID("$FreeBSD: src/sys/arm/arm/identcpu.c,v 1.14 2008/10/13 18:16:54 raj Exp $"); #include <sys/systm.h> #include <sys/param.h> #include <sys/malloc.h> @@ -75,7 +75,8 @@ CPU_CLASS_ARM10EJ, CPU_CLASS_SA1, CPU_CLASS_XSCALE, - CPU_CLASS_ARM11J + CPU_CLASS_ARM11J, + CPU_CLASS_MARVELL }; static const char * const generic_steppings[16] = { @@ -304,6 +305,15 @@ { CPU_ID_ARM1136JSR1, CPU_CLASS_ARM11J, "ARM1136J-S R1", generic_steppings }, + { CPU_ID_MV88FR131, CPU_CLASS_MARVELL, "Feroceon 88FR131", + generic_steppings }, + + { CPU_ID_MV88FR571_VD, CPU_CLASS_MARVELL, "Feroceon 88FR571-VD", + generic_steppings }, + + { CPU_ID_MV88FR571_41, CPU_CLASS_MARVELL, "Early Feroceon 88FR571", + generic_steppings }, + { 0, CPU_CLASS_NONE, NULL, NULL } }; ==== //depot/projects/vimage/src/sys/arm/arm/locore.S#6 (text+ko) ==== @@ -37,7 +37,7 @@ #include <machine/asm.h> #include <machine/armreg.h> #include <machine/pte.h> -__FBSDID("$FreeBSD: src/sys/arm/arm/locore.S,v 1.19 2008/04/08 10:24:41 kevlo Exp $"); +__FBSDID("$FreeBSD: src/sys/arm/arm/locore.S,v 1.21 2008/10/14 10:11:14 raj Exp $"); /* What size should this really be ? It is only used by initarm() */ #define INIT_ARM_STACK_SIZE 2048 @@ -66,6 +66,13 @@ ENTRY_NP(btext) ASENTRY_NP(_start) + +/* + * Move metadata ptr to r12 (ip) + */ + + mov ip, r0 + #if defined (FLASHADDR) && defined(LOADERRAMADDR) /* Check if we're running from flash. */ ldr r7, =FLASHADDR @@ -170,6 +177,8 @@ ldr pc, .Lvirt_done virt_done: + mov r0, ip /* Load argument: metadata ptr */ + mov fp, #0 /* trace back starts here */ bl _C_LABEL(initarm) /* Off we go */ @@ -245,6 +254,8 @@ ldr r0, .Lcpufuncs mov lr, pc ldr pc, [r0, #CF_IDCACHE_WBINV_ALL] + mov lr, pc + ldr pc, [r0, #CF_L2CACHE_WBINV_ALL] /* * Load the cpu_reset_needs_v4_MMU_disable flag to determine if it's ==== //depot/projects/vimage/src/sys/arm/arm/pmap.c#15 (text+ko) ==== @@ -147,10 +147,11 @@ #include "opt_vm.h" #include <sys/cdefs.h> -__FBSDID("$FreeBSD: src/sys/arm/arm/pmap.c,v 1.102 2008/09/28 05:36:25 imp Exp $"); +__FBSDID("$FreeBSD: src/sys/arm/arm/pmap.c,v 1.104 2008/10/13 18:59:59 raj Exp $"); #include <sys/param.h> #include <sys/systm.h> #include <sys/kernel.h> +#include <sys/ktr.h> #include <sys/proc.h> #include <sys/malloc.h> #include <sys/msgbuf.h> @@ -1196,27 +1197,104 @@ } static PMAP_INLINE void +pmap_l2cache_wbinv_range(pmap_t pm, vm_offset_t va, vm_size_t len) +{ + vm_size_t rest; + pd_entry_t *pde; + pt_entry_t *ptep; + + rest = MIN(PAGE_SIZE - (va & PAGE_MASK), len); + + while (len > 0) { + CTR4(KTR_PMAP, "pmap_l2cache_wbinv_range: pmap %p is_kernel %d " + "va 0x%08x len 0x%x ", pm, pm == pmap_kernel(), va, rest); + if (pmap_get_pde_pte(pm, va, &pde, &ptep) && l2pte_valid(*ptep)) + cpu_l2cache_wb_range(va, rest); + + len -= rest; + va += rest; + + rest = MIN(PAGE_SIZE, len); + } +} + +static PMAP_INLINE void pmap_idcache_wbinv_range(pmap_t pm, vm_offset_t va, vm_size_t len) { - if (pmap_is_current(pm)) + if (pmap_is_current(pm)) { cpu_idcache_wbinv_range(va, len); + pmap_l2cache_wbinv_range(pm, va, len); + } } static PMAP_INLINE void -pmap_dcache_wb_range(pmap_t pm, vm_offset_t va, vm_size_t len, - boolean_t do_inv, boolean_t rd_only) +pmap_l2cache_wb_range(pmap_t pm, vm_offset_t va, vm_size_t len) +{ + vm_size_t rest; + pd_entry_t *pde; + pt_entry_t *ptep; + + rest = MIN(PAGE_SIZE - (va & PAGE_MASK), len); + + while (len > 0) { + CTR4(KTR_PMAP, "pmap_l2cache_wb_range: pmap %p is_kernel %d " + "va 0x%08x len 0x%x ", pm, pm == pmap_kernel(), va, rest); + if (pmap_get_pde_pte(pm, va, &pde, &ptep) && l2pte_valid(*ptep)) + cpu_l2cache_wb_range(va, rest); + + len -= rest; + va += rest; + + rest = MIN(PAGE_SIZE, len); + } +} + +static PMAP_INLINE void +pmap_l2cache_inv_range(pmap_t pm, vm_offset_t va, vm_size_t len) { + vm_size_t rest; + pd_entry_t *pde; + pt_entry_t *ptep; + + rest = MIN(PAGE_SIZE - (va & PAGE_MASK), len); + + while (len > 0) { + CTR4(KTR_PMAP, "pmap_l2cache_wb_range: pmap %p is_kernel %d " + "va 0x%08x len 0x%x ", pm, pm == pmap_kernel(), va, rest); + if (pmap_get_pde_pte(pm, va, &pde, &ptep) && l2pte_valid(*ptep)) + cpu_l2cache_inv_range(va, rest); + + len -= rest; + va += rest; + rest = MIN(PAGE_SIZE, len); + } +} + +static PMAP_INLINE void +pmap_dcache_wb_range(pmap_t pm, vm_offset_t va, vm_size_t len, boolean_t do_inv, + boolean_t rd_only) +{ + CTR4(KTR_PMAP, "pmap_dcache_wb_range: pmap %p is_kernel %d va 0x%08x " + "len 0x%x ", pm, pm == pmap_kernel(), va, len); + CTR2(KTR_PMAP, " do_inv %d rd_only %d", do_inv, rd_only); + if (pmap_is_current(pm)) { if (do_inv) { - if (rd_only) + if (rd_only) { cpu_dcache_inv_range(va, len); - else + pmap_l2cache_inv_range(pm, va, len); + } + else { cpu_dcache_wbinv_range(va, len); + pmap_l2cache_wbinv_range(pm, va, len); + } } else - if (!rd_only) + if (!rd_only) { cpu_dcache_wb_range(va, len); + pmap_l2cache_wb_range(pm, va, len); + } } } @@ -1224,16 +1302,20 @@ pmap_idcache_wbinv_all(pmap_t pm) { - if (pmap_is_current(pm)) + if (pmap_is_current(pm)) { cpu_idcache_wbinv_all(); + cpu_l2cache_wbinv_all(); + } } static PMAP_INLINE void pmap_dcache_wbinv_all(pmap_t pm) { - if (pmap_is_current(pm)) + if (pmap_is_current(pm)) { cpu_dcache_wbinv_all(); + cpu_l2cache_wbinv_all(); + } } /* @@ -2169,6 +2251,8 @@ PTE_SYNC(pdep); cpu_dcache_wbinv_range((vm_offset_t)pdep, sizeof(*pdep)); + cpu_l2cache_wbinv_range((vm_offset_t)pdep, + sizeof(*pdep)); rv = 1; } } else { @@ -2185,6 +2269,8 @@ PTE_SYNC(ptep); cpu_dcache_wbinv_range((vm_offset_t)ptep, sizeof(*ptep)); + cpu_l2cache_wbinv_range((vm_offset_t)ptep, + sizeof(*ptep)); rv = 1; } } @@ -2337,6 +2423,7 @@ } cpu_dcache_wbinv_all(); + cpu_l2cache_wbinv_all(); cpu_tlb_flushID(); cpu_cpwait(); @@ -2373,6 +2460,7 @@ mtx_init(&l1_lru_lock, "l1 list lock", NULL, MTX_DEF); pmap_init_l1(l1, kernel_l1pt); cpu_dcache_wbinv_all(); + cpu_l2cache_wbinv_all(); virtual_avail = round_page(virtual_avail); virtual_end = lastaddr; @@ -2402,6 +2490,7 @@ struct pcb *pcb; pmap_idcache_wbinv_all(pmap); + cpu_l2cache_wbinv_all(); pmap_tlb_flushID(pmap); cpu_cpwait(); if (vector_page < KERNBASE) { @@ -2589,6 +2678,7 @@ * rarely */ cpu_dcache_wbinv_all(); + cpu_l2cache_wbinv_all(); cpu_tlb_flushD(); cpu_cpwait(); kernel_vm_end = pmap_curmaxkvaddr; @@ -2614,6 +2704,7 @@ vm_page_lock_queues(); PMAP_LOCK(pmap); cpu_idcache_wbinv_all(); + cpu_l2cache_wbinv_all(); for (pv = TAILQ_FIRST(&pmap->pm_pvlist); pv; pv = npv) { if (pv->pv_flags & PVF_WIRED) { /* The page is wired, cannot remove it now. */ @@ -2726,6 +2817,7 @@ (uint32_t) pte, opte, *pte)); if (l2pte_valid(opte)) { cpu_dcache_wbinv_range(va, PAGE_SIZE); + cpu_l2cache_wbinv_range(va, PAGE_SIZE); cpu_tlb_flushD_SE(va); cpu_cpwait(); } else { @@ -2784,6 +2876,7 @@ opte = *pte; if (l2pte_valid(opte)) { cpu_dcache_wbinv_range(va, PAGE_SIZE); + cpu_l2cache_wbinv_range(va, PAGE_SIZE); cpu_tlb_flushD_SE(va); cpu_cpwait(); *pte = 0; @@ -3052,6 +3145,9 @@ u_int flags; int flush; + CTR4(KTR_PMAP, "pmap_protect: pmap %p sva 0x%08x eva 0x%08x prot %x", + pm, sva, eva, prot); + if ((prot & VM_PROT_READ) == 0) { pmap_remove(pm, sva, eva); return; @@ -3286,9 +3382,11 @@ */ if (pmap_is_current(pmap) && (oflags & PVF_NC) == 0 && - (opte & L2_S_PROT_W) != 0 && - (prot & VM_PROT_WRITE) == 0) + (opte & L2_S_PROT_W) != 0 && + (prot & VM_PROT_WRITE) == 0) { cpu_dcache_wb_range(va, PAGE_SIZE); + pmap_l2cache_wb_range(pmap, va, PAGE_SIZE); + } } else { /* * New mapping, or changing the backing page @@ -3777,11 +3875,15 @@ total++; if (is_exec) { cpu_idcache_wbinv_range(sva, - PAGE_SIZE); + PAGE_SIZE); + cpu_l2cache_wbinv_range(sva, + PAGE_SIZE); cpu_tlb_flushID_SE(sva); } else if (is_refd) { cpu_dcache_wbinv_range(sva, - PAGE_SIZE); + PAGE_SIZE); + cpu_l2cache_wbinv_range(sva, + PAGE_SIZE); cpu_tlb_flushD_SE(sva); } } else if (total == PMAP_REMOVE_CLEAN_LIST_SIZE) { @@ -3789,6 +3891,7 @@ * for a current pmap */ cpu_idcache_wbinv_all(); + cpu_l2cache_wbinv_all(); flushall = 1; total++; } @@ -3842,29 +3945,29 @@ if (off || size != PAGE_SIZE) { bzero(dstpg + off, size); cpu_dcache_wbinv_range((vm_offset_t)(dstpg + off), size); + cpu_l2cache_wbinv_range((vm_offset_t)(dstpg + off), size); } else { bzero_page((vm_offset_t)dstpg); cpu_dcache_wbinv_range((vm_offset_t)dstpg, PAGE_SIZE); + cpu_l2cache_wbinv_range((vm_offset_t)dstpg, PAGE_SIZE); } #else mtx_lock(&cmtx); /* - * Hook in the page, zero it, and purge the cache for that - * zeroed page. Invalidate the TLB as needed. + * Hook in the page, zero it, invalidate the TLB as needed. + * + * Note the temporary zero-page mapping must be a non-cached page in + * ordert to work without corruption when write-allocate is enabled. */ - *cdst_pte = L2_S_PROTO | phys | - L2_S_PROT(PTE_KERNEL, VM_PROT_WRITE) | pte_l2_s_cache_mode; - PTE_SYNC(cdst_pte); + *cdst_pte = L2_S_PROTO | phys | L2_S_PROT(PTE_KERNEL, VM_PROT_WRITE); cpu_tlb_flushD_SE(cdstp); cpu_cpwait(); - if (off || size != PAGE_SIZE) { + if (off || size != PAGE_SIZE) bzero((void *)(cdstp + off), size); - cpu_dcache_wbinv_range(cdstp + off, size); - } else { + else bzero_page(cdstp); - cpu_dcache_wbinv_range(cdstp, PAGE_SIZE); - } + mtx_unlock(&cmtx); #endif } @@ -4141,6 +4244,8 @@ mtx_unlock(&cmtx); cpu_dcache_inv_range(csrcp, PAGE_SIZE); cpu_dcache_wbinv_range(cdstp, PAGE_SIZE); + cpu_l2cache_inv_range(csrcp, PAGE_SIZE); + cpu_l2cache_wbinv_range(cdstp, PAGE_SIZE); } #endif /* (ARM_MMU_GENERIC + ARM_MMU_SA1) != 0 */ @@ -4203,6 +4308,7 @@ #endif cpu_dcache_wbinv_all(); + cpu_l2cache_wbinv_all(); if (_arm_memcpy && PAGE_SIZE >= _min_memcpy_size && _arm_memcpy((void *)VM_PAGE_TO_PHYS(dst), (void *)VM_PAGE_TO_PHYS(src), PAGE_SIZE, IS_PHYSICAL) == 0) @@ -4212,6 +4318,7 @@ dstpg = arm_ptovirt(VM_PAGE_TO_PHYS(dst)); bcopy_page(srcpg, dstpg); cpu_dcache_wbinv_range(dstpg, PAGE_SIZE); + cpu_l2cache_wbinv_range(dstpg, PAGE_SIZE); #else pmap_copy_page_func(VM_PAGE_TO_PHYS(src), VM_PAGE_TO_PHYS(dst)); #endif ==== //depot/projects/vimage/src/sys/arm/arm/swtch.S#6 (text+ko) ==== @@ -83,7 +83,7 @@ #include <machine/asm.h> #include <machine/asmacros.h> #include <machine/armreg.h> -__FBSDID("$FreeBSD: src/sys/arm/arm/swtch.S,v 1.23 2008/08/02 00:10:38 cognet Exp $"); +__FBSDID("$FreeBSD: src/sys/arm/arm/swtch.S,v 1.24 2008/10/13 18:59:59 raj Exp $"); /* @@ -143,6 +143,8 @@ ldr r9, .Lcpufuncs mov lr, pc ldr pc, [r9, #CF_IDCACHE_WBINV_ALL] + mov lr, pc + ldr pc, [r9, #CF_L2CACHE_WBINV_ALL] ldr r0, [r7, #(PCB_PL1VEC)] ldr r1, [r7, #(PCB_DACR)] /* @@ -172,6 +174,8 @@ movne r1, #4 movne lr, pc ldrne pc, [r9, #CF_DCACHE_WB_RANGE] + movne lr, pc + ldrne pc, [r9, #CF_L2CACHE_WB_RANGE] #endif /* PMAP_INCLUDE_PTE_SYNC */ /* @@ -328,6 +332,8 @@ ldr r1, .Lcpufuncs mov lr, pc ldr pc, [r1, #CF_IDCACHE_WBINV_ALL] + mov lr, pc + ldr pc, [r1, #CF_L2CACHE_WBINV_ALL] .Lcs_cache_purge_skipped: /* rem: r6 = lock */ /* rem: r9 = new PCB */ @@ -360,6 +366,8 @@ mov r1, #4 mov lr, pc ldr pc, [r2, #CF_DCACHE_WB_RANGE] + mov lr, pc + ldr pc, [r2, #CF_L2CACHE_WB_RANGE] .Lcs_same_vector: #endif /* PMAP_INCLUDE_PTE_SYNC */ ==== //depot/projects/vimage/src/sys/arm/include/armreg.h#4 (text+ko) ==== @@ -35,7 +35,7 @@ * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF * SUCH DAMAGE. * - * $FreeBSD: src/sys/arm/include/armreg.h,v 1.7 2007/10/18 05:06:58 imp Exp $ + * $FreeBSD: src/sys/arm/include/armreg.h,v 1.8 2008/10/13 18:16:54 raj Exp $ */ #ifndef MACHINE_ARMREG_H @@ -148,6 +148,9 @@ #define CPU_ID_SA110 0x4401a100 #define CPU_ID_SA1100 0x4401a110 >>> TRUNCATED FOR MAIL (1000 lines) <<<
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