Date: Fri, 31 Mar 1995 05:54:43 -0800 From: "Justin T. Gibbs" <gibbs> To: CVS-commiters, cvs-sys Subject: cvs commit: src/sys/i386/scsi aic7xxx.c aic7xxx.h Message-ID: <199503311354.FAA20152@freefall.cdrom.com>
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gibbs 95/03/31 05:54:42 Modified: sys/i386/isa aic7770.c Log: Use EISA_MAX_SLOTS to be consistent with other EISA drivers. Fix off by one error in slot probe. Update some comments. Submitted by: rgrimes@FreeBSD.org Modified: sys/i386/scsi aic7xxx.c aic7xxx.h Log: Major overhaul of the aic7xxx driver: - catch the interrupt type (EDGE/LEVEL) before chip reset instead of guessing the right type. - Add pause variable to the ahc struct to better handle the different interrupt types and pausing the sequencer. - CLRINTSTAT -> CLRSCSIINT: This is a documented bit in the CLRINT register in newer Adaptec documentation, so use their name for it. - Report valid residual byte counts. - Don't mess with the target scratch areas > id 8 on single, narrow, channel devices. The BIOS does a checksum of this area and can flip out if we zero it out. - Initialize the sequencer FLAGS scratch ram variable in the single channel devices to 0. This was the cause of the annoying warning where we would get a cmdcmplt the first time we did any type of transfer negotiation with no valid scb. It also fixes the problem that looked like the INTSTAT register wasn't clearing fast enough. This only showed up on 294x cards, not motherboard aic7870s. - Add the AHC_AIC7870 type and use it as the superset of aic7870 based controllers. - clear the sync offset section of the targ scratch area so that we default to asyncronous transfers. This was only a problem for wide controllers because there was a scenario where the offset wouldn't get updated before a data(out/in) phase would occur. This required some change in the sequencer code since we were depending on this field to hold the rate to negotiate. - allow sync and wide negotiated commands to be tagged (the sequencer now handles this properly).
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