Date: Thu, 15 Sep 2011 22:57:55 -0700 From: Garrett Cooper <yanegomi@gmail.com> To: lev@FreeBSD.org Cc: FreeBSD-Current <freebsd-current@freebsd.org>, Arnaud Lacombe <lacombar@gmail.com> Subject: Re: 9.0-BETA2 do not support SpeedStep on old Core2Duo E4500 too Message-ID: <19E6ACF0-D03E-4744-B341-A841D50A74B5@gmail.com> In-Reply-To: <672381881.20110916092157@serebryakov.spb.ru> References: <CACqU3MWNgq4RkBu7-eUON20CWdfO38KbM-8hR0AnFV-mn_=-7A@mail.gmail.com> <CACqU3MW1Ge1AnQuF4uuRDCJzB-OcLGSwmFKYck_q-xy%2BRkzHNw@mail.gmail.com> <672381881.20110916092157@serebryakov.spb.ru>
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On Sep 15, 2011, at 10:21 PM, Lev Serebryakov wrote: > Hello, Arnaud. > You wrote 16 =D3=C5=CE=D4=D1=C2=D2=D1 2011 =C7., 1:19:29: >=20 >=20 > CPU: Intel(R) Core(TM)2 Duo CPU E4500 @ 2.20GHz (2200.09-MHz = K8-class CPU) > Origin =3D "GenuineIntel" Id =3D 0x6fd Family =3D 6 Model =3D f = Stepping =3D 13 > = Features=3D0xbfebfbff<FPU,VME,DE,PSE,TSC,MSR,PAE,MCE,CX8,APIC,SEP,MTRR,PGE= ,MCA,CMOV,PAT,PSE36,CLFLUSH,DTS,ACPI,MMX,FXSR,SSE,SSE2,SS,HTT,TM,PBE> > Features2=3D0xe39d<SSE3,DTES64,MON,DS_CPL,EST,TM2,SSSE3,CX16,xTPR,PDCM>= > AMD Features=3D0x20100800<SYSCALL,NX,LM> > AMD Features2=3D0x1<LAHF> > TSC: P-state invariant > .... > coretemp0: <CPU On-Die Thermal Sensors> on cpu0 > est0: <Enhanced SpeedStep Frequency Control> on cpu0 > est: CPU supports Enhanced Speedstep, but is not recognized. > est: cpu_vendor GenuineIntel, msr b280b2806000b28 > device_attach: est0 attach returned 6 > p4tcc0: <CPU Frequency Thermal Control> on cpu0 > coretemp1: <CPU On-Die Thermal Sensors> on cpu1 > est1: <Enhanced SpeedStep Frequency Control> on cpu1 > est: CPU supports Enhanced Speedstep, but is not recognized. > est: cpu_vendor GenuineIntel, msr b280b2806000b28 > device_attach: est1 attach returned 6 > p4tcc1: <CPU Frequency Thermal Control> on cpu1 Like Andriy suggested, it might be an ACPI issue because it = works just fine on these machines running 9.0-BETA2: $ dmesg | egrep 'Pentium|Xeon|^(coretemp|p4tcc|est)' CPU: Pentium(R) Dual-Core CPU E5800 @ 3.20GHz (3200.06-MHz = K8-class CPU) est0: <Enhanced SpeedStep Frequency Control> on cpu0 p4tcc0: <CPU Frequency Thermal Control> on cpu0 est1: <Enhanced SpeedStep Frequency Control> on cpu1 p4tcc1: <CPU Frequency Thermal Control> on cpu1 $ dmesg | egrep 'Xeon|^(coretemp|p4tcc|est)' CPU: Intel(R) Xeon(R) CPU X3230 @ 2.66GHz (2664.06-MHz = K8-class CPU) est0: <Enhanced SpeedStep Frequency Control> on cpu0 p4tcc0: <CPU Frequency Thermal Control> on cpu0 est1: <Enhanced SpeedStep Frequency Control> on cpu1 p4tcc1: <CPU Frequency Thermal Control> on cpu1 est2: <Enhanced SpeedStep Frequency Control> on cpu2 p4tcc2: <CPU Frequency Thermal Control> on cpu2 est3: <Enhanced SpeedStep Frequency Control> on cpu3 p4tcc3: <CPU Frequency Thermal Control> on cpu3 $ dmesg | egrep 'Xeon|^(coretemp|est)' CPU: Intel(R) Xeon(R) CPU W3520 @ 2.67GHz (2672.78-MHz = K8-class CPU) coretemp0: <CPU On-Die Thermal Sensors> on cpu0 est0: <Enhanced SpeedStep Frequency Control> on cpu0 coretemp1: <CPU On-Die Thermal Sensors> on cpu1 est1: <Enhanced SpeedStep Frequency Control> on cpu1 coretemp2: <CPU On-Die Thermal Sensors> on cpu2 est2: <Enhanced SpeedStep Frequency Control> on cpu2 coretemp3: <CPU On-Die Thermal Sensors> on cpu3 est3: <Enhanced SpeedStep Frequency Control> on cpu3 coretemp4: <CPU On-Die Thermal Sensors> on cpu4 est4: <Enhanced SpeedStep Frequency Control> on cpu4 coretemp5: <CPU On-Die Thermal Sensors> on cpu5 est5: <Enhanced SpeedStep Frequency Control> on cpu5 coretemp6: <CPU On-Die Thermal Sensors> on cpu6 est6: <Enhanced SpeedStep Frequency Control> on cpu6 coretemp7: <CPU On-Die Thermal Sensors> on cpu7 est7: <Enhanced SpeedStep Frequency Control> on cpu7 Thanks, -Garrett=
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