Date: Sun, 19 Dec 1999 18:54:38 -0500 (EST) From: "Alexander N. Kabaev" <kabaev@mail.ru> To: freebsd-hackers@freebsd.org Subject: Page attribute table (PAT) support? Message-ID: <XFMail.991219185438.kabaev@mail.ru>
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Are there plans to add support for PAT on Intel P6 and AMD Athlon processors? This feature provides more flexible interface allowing to setup various memory cache modes on a page-by-page bases. It is much easier to program than MTRRs and does not suffer from their size/alignment limitations. Provided there are patches to support PAT in kernel, how it should be exposed to the user level code? Will something like mmprotect system call suffice? -Alex To Unsubscribe: send mail to majordomo@FreeBSD.org with "unsubscribe freebsd-hackers" in the body of the message
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