Skip site navigation (1)Skip section navigation (2)
Date:      Tue, 1 Oct 1996 22:25:31 -0700 (PDT)
From:      "Rodney W. Grimes" <rgrimes@GndRsh.aac.dev.com>
To:        richard@pegasus.com (Richard Foulk)
Cc:        freebsd-hardware@FreeBSD.ORG
Subject:   Re: H/W recommendation
Message-ID:  <199610020525.WAA20652@GndRsh.aac.dev.com>
In-Reply-To: <199610020227.QAA22441@pegasus.com> from Richard Foulk at "Oct 1, 96 04:26:50 pm"

next in thread | previous in thread | raw e-mail | index | archive | help
> } > As can be seen the best parts to be using are the 100, 133, 166 and 200,
> } > with the exception that at a mulitplier of 3 the CPU starves for memory.
> } 
> } Depends on the cache, and whether you get a Pentium or a Pentium Pro.  A
> } Pentium Pro with a built-in 512 KB level 2 cache usually won't starve, even
> } on UNIX boxes. (To put things in perspective, a typical FreeBSD kernel,
> } with unnecessary drivers removed, is about that size.) But the bargain
> } basement version of the Pentium Pro, with the 256 KB cache, will drag in
> } the same configuration.  Unfortunately, far too many clone vendors just
> } HAPPEN not to mention in their ads that they're including the cheaper CPU.
> } 
> } I'd like to see a megabyte cache on board.
> } 
> 
> This isn't quite the way cache works.  A board with 512K of cache
> won't hold 512K of code, even if that were necessary -- most of the
> code in the kernel or any other large program seldom gets run.
> 
> But the cache isn't just a mirror of memory, probably half the
> cache is available for code storage (depends on how it's implemented.)
> 
> More importantly, diminishing returns sets in real quick after 256K,
> (actually before.)

I wish I had the time to go calculate what a 1MB 4 set associtive
seperate I/D write allocating cache would do for a Pentium 200
running FreeBSD, but I suspect quite a lot!  It would probably do
very little for the Pentium Pro, given that the internal 256K cache
is already set associative and non-blocking.

The current design of direct map external caches does pretty much top
out at 256K, but when you add associative sets and split the I and D
you eliminate some real bottlenecks (like large bcopy'ies that end
up displacing all your cached code in the external cache :-().

An external really fast memory to memory DMA engine might be cheaper
and give you the same overall system performance boost :-).  Too bad
the dreaded DMA on x86 machines is still based on the stupid old ISA
DMA controller.  Hummm... can I make a 2940 into a DMA engine, nahh..
the PCI bus is too slow compared to the 176 or so MB/s of usable
memory bandwidth :-(.


-- 
Rod Grimes                                      rgrimes@gndrsh.aac.dev.com
Accurate Automation Company                 Reliable computers for FreeBSD



Want to link to this message? Use this URL: <https://mail-archive.FreeBSD.org/cgi/mid.cgi?199610020525.WAA20652>