Date: Tue, 5 Apr 2011 15:33:12 +0000 (UTC) From: Marcel Moolenaar <marcel@FreeBSD.org> To: src-committers@freebsd.org, svn-src-projects@freebsd.org Subject: svn commit: r220365 - in projects/altix/sys: conf ia64/ia64 ia64/include Message-ID: <201104051533.p35FXCcT022531@svn.freebsd.org>
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Author: marcel Date: Tue Apr 5 15:33:12 2011 New Revision: 220365 URL: http://svn.freebsd.org/changeset/base/220365 Log: Slightly tweak how we're running in PBVM. In particular: 1. The loader maps the beginning of text as well as the beginning of data. Put critical text and data (read: IVT related) at the beginning of the segments to make sure we don't get nested faults when we can't deal with them. 2. The loader uses more TRs, so use different ones for now. This should all be dynamic and handled by TR management code. This will do for now. This works for kernels and fixes the hard hangs when trying to run user space. The problem was that critical data was not mapped and we got nested TLB faults. Modified: projects/altix/sys/conf/ldscript.ia64 projects/altix/sys/ia64/ia64/exception.S projects/altix/sys/ia64/ia64/genassym.c projects/altix/sys/ia64/ia64/locore.S projects/altix/sys/ia64/ia64/machdep.c projects/altix/sys/ia64/ia64/pmap.c projects/altix/sys/ia64/include/md_var.h Modified: projects/altix/sys/conf/ldscript.ia64 ============================================================================== --- projects/altix/sys/conf/ldscript.ia64 Tue Apr 5 15:11:09 2011 (r220364) +++ projects/altix/sys/conf/ldscript.ia64 Tue Apr 5 15:33:12 2011 (r220365) @@ -11,10 +11,10 @@ SECTIONS .interp : { *(.interp) } PROVIDE (btext = .); - .ivt : { *(.ivt) } .text : { - *(.text.ivt) + *(.ivt) + *(.ivt.text) *(.text .stub .text.* .gnu.linkonce.t.*) /* .gnu.warning sections are handled specially by elf32.em. */ *(.gnu.warning) @@ -62,7 +62,8 @@ SECTIONS .data : { - *(.data.kstack .data .data.* .gnu.linkonce.d.*) + *(.ivt.data) + *(.data .data.* .gnu.linkonce.d.*) SORT(CONSTRUCTORS) } .data1 : { *(.data1) } Modified: projects/altix/sys/ia64/ia64/exception.S ============================================================================== --- projects/altix/sys/ia64/ia64/exception.S Tue Apr 5 15:11:09 2011 (r220364) +++ projects/altix/sys/ia64/ia64/exception.S Tue Apr 5 15:33:12 2011 (r220365) @@ -48,9 +48,16 @@ __FBSDID("$FreeBSD$"); * ar.k4 = PCPU data */ + .section .ivt.data, "aw" + + .global pmap_ptc_g_sem +pmap_ptc_g_sem: data8 0 + + .global ia64_kptdir +ia64_kptdir: data8 0 + #ifdef EXCEPTION_TRACING - .data .global xtrace, xhead xtrace: .space 1024*5*8 xhead: data8 xtrace @@ -101,7 +108,7 @@ xhead: data8 xtrace #endif - .section .text.ivt, "ax" + .section .ivt.text, "ax" /* * exception_save: save interrupted state @@ -129,7 +136,7 @@ ENTRY_NOPROFILE(exception_save, 0) ;; } { .mmi - cmp.le p14,p15=5,r31 + cmp.le p14,p15=IA64_VM_MINKERN_REGION,r31 ;; (p15) mov r23=ar.k7 // kernel memory stack (p14) mov r23=sp @@ -233,7 +240,7 @@ exception_save_restart: { .mmi st8 [r30]=r19,16 // rnat st8 [r31]=r0,16 // __spare - cmp.le p12,p13=5,r24 + cmp.le p12,p13=IA64_VM_MINKERN_REGION,r24 ;; } { .mmi @@ -602,7 +609,7 @@ ENTRY_NOPROFILE(exception_restore, 0) { .mmi ld8.fill r1=[r30],16 // gp ld8 r27=[r31],16 // ndirty - cmp.le p14,p15=5,r28 + cmp.le p14,p15=IA64_VM_MINKERN_REGION,r28 ;; } { .mmi @@ -915,7 +922,7 @@ IVT_ENTRY(Alternate_Instruction_TLB, 0x0 extr.u r17=r16,61,3 // get region number mov r19=PTE_PRESENT+PTE_ACCESSED+PTE_DIRTY+PTE_PL_KERN+PTE_AR_RWX ;; - cmp.eq p13,p0=4,r17 // RR4? + cmp.eq p13,p0=IA64_PBVM_RR,r17 // RR4? (p13) br.cond.sptk.few 4f ;; cmp.ge p13,p0=5,r17 // RR0-RR5? @@ -958,7 +965,7 @@ IVT_ENTRY(Alternate_Data_TLB, 0x1000) extr.u r17=r16,61,3 // get region number mov r19=PTE_PRESENT+PTE_ACCESSED+PTE_DIRTY+PTE_PL_KERN+PTE_AR_RWX ;; - cmp.eq p13,p0=4,r17 // RR4? + cmp.eq p13,p0=IA64_PBVM_RR,r17 // RR4? (p13) br.cond.sptk.few 4f ;; cmp.ge p13,p0=5,r17 // RR0-RR5? @@ -1007,21 +1014,22 @@ IVT_ENTRY(Data_Nested_TLB, 0x1400) // double nested faults. Since all virtual addresses we encounter // here are direct mapped region 7 addresses, we have no problem // constructing physical addresses. + { .mlx - rsm psr.dt + nop 0 movl r27=ia64_kptdir ;; } { .mii - srlz.d - dep r27=0,r27,61,3 - ;; + ld8 r27=[r27] extr.u r28=r30,3*PAGE_SHIFT-8, PAGE_SHIFT-3 // dir L0 index -} -{ .mii - ld8 r27=[r27] // dir L0 page extr.u r26=r30,2*PAGE_SHIFT-5, PAGE_SHIFT-3 // dir L1 index ;; +} +{ .mmi + rsm psr.dt + ;; + srlz.d dep r27=0,r27,61,3 ;; } Modified: projects/altix/sys/ia64/ia64/genassym.c ============================================================================== --- projects/altix/sys/ia64/ia64/genassym.c Tue Apr 5 15:11:09 2011 (r220364) +++ projects/altix/sys/ia64/ia64/genassym.c Tue Apr 5 15:33:12 2011 (r220365) @@ -82,6 +82,8 @@ ASSYM(IA64_PBVM_PAGE_SHIFT, IA64_PBVM_PA ASSYM(IA64_PBVM_PGTBL, IA64_PBVM_PGTBL); ASSYM(IA64_PBVM_RR, IA64_PBVM_RR); +ASSYM(IA64_VM_MINKERN_REGION, IA64_VM_MINKERN_REGION); + ASSYM(KSTACK_PAGES, KSTACK_PAGES); ASSYM(MC_PRESERVED, offsetof(mcontext_t, mc_preserved)); Modified: projects/altix/sys/ia64/ia64/locore.S ============================================================================== --- projects/altix/sys/ia64/ia64/locore.S Tue Apr 5 15:11:09 2011 (r220364) +++ projects/altix/sys/ia64/ia64/locore.S Tue Apr 5 15:33:12 2011 (r220365) @@ -1,4 +1,5 @@ /*- + * Copyright (c) 2001-2011 Marcel Moolenaar * Copyright (c) 1998 Doug Rabson * All rights reserved. * @@ -40,7 +41,7 @@ */ #define FW_STACK_SIZE 3*PAGE_SIZE - .section .data.kstack, "aw" + .section .ivt.data, "aw" .align PAGE_SIZE .global kstack kstack: .space FW_STACK_SIZE @@ -80,13 +81,17 @@ ENTRY_NOPROFILE(__start, 1) movl gp=__gp // find kernel globals ;; } - +{ .mlx mov ar.bspstore=r16 // switch backing store + movl r16=bootinfo ;; +} +{ .mmi + st8 [r16]=r8 // save the PA of the bootinfo block loadrs // invalidate regs mov r17=IA64_DCR_DEFAULT ;; - +} { .mmi mov cr.dcr=r17 mov ar.rsc=3 // turn rse back on @@ -100,13 +105,13 @@ ENTRY_NOPROFILE(__start, 1) ;; // we just need to process fptrs } { .mib - mov r9=r8 // Save pointer to bootinfo. + nop 0 nop 0 br.call.sptk.many rp=_reloc ;; } { .mib - mov out0=r9 // Pass pointer to bootinfo. + nop 0 nop 0 br.call.sptk.many rp=ia64_init ;; Modified: projects/altix/sys/ia64/ia64/machdep.c ============================================================================== --- projects/altix/sys/ia64/ia64/machdep.c Tue Apr 5 15:11:09 2011 (r220364) +++ projects/altix/sys/ia64/ia64/machdep.c Tue Apr 5 15:33:12 2011 (r220365) @@ -573,7 +573,7 @@ map_vhpt(uintptr_t vhpt) ia64_set_ifa(vhpt); ia64_set_itir(pmap_vhpt_log2size << 2); ia64_srlz_d(); - __asm __volatile("itr.d dtr[%0]=%1" :: "r"(4), "r"(pte)); + __asm __volatile("itr.d dtr[%0]=%1" :: "r"(3), "r"(pte)); __asm __volatile("mov psr.l=%0" :: "r" (psr)); ia64_srlz_i(); } @@ -611,9 +611,9 @@ map_pal_code(void) ia64_set_ifa(va); ia64_set_itir(shft << 2); ia64_srlz_d(); - __asm __volatile("itr.d dtr[%0]=%1" :: "r"(2), "r"(pte)); + __asm __volatile("itr.d dtr[%0]=%1" :: "r"(4), "r"(pte)); ia64_srlz_d(); - __asm __volatile("itr.i itr[%0]=%1" :: "r"(2), "r"(pte)); + __asm __volatile("itr.i itr[%0]=%1" :: "r"(1), "r"(pte)); __asm __volatile("mov psr.l=%0" :: "r" (psr)); ia64_srlz_i(); } @@ -637,9 +637,9 @@ map_gateway_page(void) ia64_set_ifa(VM_MAXUSER_ADDRESS); ia64_set_itir(PAGE_SHIFT << 2); ia64_srlz_d(); - __asm __volatile("itr.d dtr[%0]=%1" :: "r"(3), "r"(pte)); + __asm __volatile("itr.d dtr[%0]=%1" :: "r"(5), "r"(pte)); ia64_srlz_d(); - __asm __volatile("itr.i itr[%0]=%1" :: "r"(3), "r"(pte)); + __asm __volatile("itr.i itr[%0]=%1" :: "r"(2), "r"(pte)); __asm __volatile("mov psr.l=%0" :: "r" (psr)); ia64_srlz_i(); @@ -685,7 +685,7 @@ calculate_frequencies(void) } struct ia64_init_return -ia64_init(struct bootinfo *bi) +ia64_init(void) { struct ia64_init_return ret; int phys_avail_cnt; @@ -697,8 +697,6 @@ ia64_init(struct bootinfo *bi) /* NO OUTPUT ALLOWED UNTIL FURTHER NOTICE */ - bootinfo = bi; - /* * TODO: Disable interrupts, floating point etc. * Maybe flush cache and tlb Modified: projects/altix/sys/ia64/ia64/pmap.c ============================================================================== --- projects/altix/sys/ia64/ia64/pmap.c Tue Apr 5 15:11:09 2011 (r220364) +++ projects/altix/sys/ia64/ia64/pmap.c Tue Apr 5 15:33:12 2011 (r220365) @@ -159,7 +159,8 @@ vm_offset_t virtual_end; /* VA of last a * Kernel virtual memory management. */ static int nkpt; -struct ia64_lpte ***ia64_kptdir; +extern struct ia64_lpte ***ia64_kptdir; + #define KPTE_DIR0_INDEX(va) \ (((va) >> (3*PAGE_SHIFT-8)) & ((1<<(PAGE_SHIFT-3))-1)) #define KPTE_DIR1_INDEX(va) \ @@ -177,7 +178,7 @@ static uint64_t pmap_ptc_e_count2 = 2; static uint64_t pmap_ptc_e_stride1 = 0x2000; static uint64_t pmap_ptc_e_stride2 = 0x100000000; -volatile u_long pmap_ptc_g_sem; +extern volatile u_long pmap_ptc_g_sem; /* * Data for the RID allocator Modified: projects/altix/sys/ia64/include/md_var.h ============================================================================== --- projects/altix/sys/ia64/include/md_var.h Tue Apr 5 15:11:09 2011 (r220364) +++ projects/altix/sys/ia64/include/md_var.h Tue Apr 5 15:33:12 2011 (r220365) @@ -61,7 +61,6 @@ ia64_bsp_adjust(uint64_t bsp, int nslots #ifdef _KERNEL struct _special; -struct bootinfo; struct pcpu; struct thread; struct trapframe; @@ -94,7 +93,7 @@ int ia64_highfp_drop(struct thread *); int ia64_highfp_enable(struct thread *, struct trapframe *); int ia64_highfp_save(struct thread *); int ia64_highfp_save_ipi(void); -struct ia64_init_return ia64_init(struct bootinfo *); +struct ia64_init_return ia64_init(void); u_int ia64_itc_freq(void); void ia64_probe_sapics(void); void ia64_sync_icache(vm_offset_t, vm_size_t);
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