Date: Fri, 28 Dec 2001 19:51:53 -0500 (EST) From: Mike Silbersack <silby@silby.com> To: Duraid Madina <duraid@fl.net.au> Cc: <hackers@freebsd.org> Subject: Re: SSE bcopy etc. Message-ID: <Pine.BSF.4.30.0112281947240.92969-100000@niwun.pair.com> In-Reply-To: <3C2D100F.80303@fl.net.au>
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On Sat, 29 Dec 2001, Duraid Madina wrote: > Hi all, > > While we're on the subject of AMD processors... > > Has anyone considered adding Pentium 2/3/4/Athlon/Athlon XP support > to the low level string/bytecopy routines? If we just supported SSE (1) > that'd get us (okay, me) a pretty nice performance boost on the P2, P3, > P4 and Athlon XP, all in one hit. These days, the "average" new computer > supports SSE, and since the GCC 3.x/binutils folk are on their way to > supporting this stuff in a Standard way (e.g. '-msse', '-march=athlon' > etc.) maybe it's time to code something up? > > Hmmm. > > Duraid > > (P.S. Apologies if there's already SSE/3dnow bcopy stuff in the kernel - > I couldn't see it!) We already have i586 and i686 specialized zero / copy code, so the idea of SSE based routines wouldn't be out of the question. If you write up suitable zero / copy replacements and post them to freebsd-arch, that would get the ball rolling. The one major problem that you're likely to encounter is collision of these registers with other uses throughout the kernel; I believe that the i586 optimizations were partially disabled in -current due to this problem. So, if you're interested in doing this you might consider starting smaller by just seeing what you can do with instruction reordering and/or the use of prefetch instructions. Using SSE registers might be more of a hassle than it's worth. Mike "Silby" Silbersack To Unsubscribe: send mail to majordomo@FreeBSD.org with "unsubscribe freebsd-hackers" in the body of the message
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