Date: Sun, 7 Jun 2015 13:37:08 GMT From: iateaca@FreeBSD.org To: svn-soc-all@FreeBSD.org Subject: socsvn commit: r286781 - soc2015/iateaca/bhyve-ne2000-head/usr.sbin/bhyve Message-ID: <201506071337.t57Db8e6047169@socsvn.freebsd.org>
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Author: iateaca Date: Sun Jun 7 13:37:08 2015 New Revision: 286781 URL: http://svnweb.FreeBSD.org/socsvn/?view=rev&rev=286781 Log: emulate the write on ED_CR_TXP reg and implement a mechanism for asserting interrupts Modified: soc2015/iateaca/bhyve-ne2000-head/usr.sbin/bhyve/pci_ne2000.c Modified: soc2015/iateaca/bhyve-ne2000-head/usr.sbin/bhyve/pci_ne2000.c ============================================================================== --- soc2015/iateaca/bhyve-ne2000-head/usr.sbin/bhyve/pci_ne2000.c Sun Jun 7 13:18:13 2015 (r286780) +++ soc2015/iateaca/bhyve-ne2000-head/usr.sbin/bhyve/pci_ne2000.c Sun Jun 7 13:37:08 2015 (r286781) @@ -56,6 +56,7 @@ uint8_t reset; /* State Variables */ + uint8_t lintr; uint8_t page; uint8_t remote_read; uint8_t remote_write; @@ -147,6 +148,26 @@ ne2000_set_reg_by_offset(sc, page, offset, reg_value); } +static void +pci_ne2000_update_intr(struct pci_ne2000_softc *sc) +{ + uint8_t isr = 0; + + isr = ne2000_get_reg_by_offset(sc, NE2000_P0, ED_P0_ISR); + + if (isr) { + if (!sc->lintr) { + pci_lintr_assert(sc->asc_pi); + sc->lintr = 1; + } + } else { + if (sc->lintr) { + pci_lintr_deassert(sc->asc_pi); + sc->lintr = 0; + } + } +} + static int pci_ne2000_init(struct vmctx *ctx, struct pci_devinst *pi, char *opts) { @@ -340,6 +361,12 @@ uint16_t rbcr = 0; uint16_t rsar = 0; + uint8_t tbcr0 = 0; + uint8_t tbcr1 = 0; + + uint16_t tbcr = 0; + uint8_t tpsr = 0; + switch (offset) { case ED_P0_CR: if (value & ED_CR_STP) { @@ -368,14 +395,34 @@ ED_P0_RSAR1); rsar = rsar0 | (rsar1 << 8); - DPRINTF("ED driver started a Remote DMA %s op from %d address of %d bytes", + DPRINTF("Remote DMA %s: from %d address of %d bytes", sc->remote_read ? "read" : "write", rsar, rbcr); } if (value & ED_CR_TXP) { + assert(!(sc->remote_read || sc->remote_write)); + assert(value & ED_CR_STA); + + tpsr = ne2000_get_reg_by_offset(sc, NE2000_P0, + ED_P0_TPSR); + tbcr0 = ne2000_get_reg_by_offset(sc, NE2000_P0, + ED_P0_TBCR0); + tbcr1 = ne2000_get_reg_by_offset(sc, NE2000_P0, + ED_P0_TBCR1); + tbcr = tbcr0 | (tbcr1 << 8); + + DPRINTF("Transmit Packet: from %d address of %d bytes", + tpsr * ED_PAGE_SIZE, tbcr); + + /* TODO send the packet on the tap interface */ + + ne2000_set_field_by_offset(sc, NE2000_P0, ED_P0_ISR, + ED_ISR_PTX, ED_ISR_PTX); + pci_ne2000_update_intr(sc); } break; case ED_P0_ISR: ne2000_set_field_by_offset(sc, NE2000_P0, ED_P0_ISR, value, 0); + pci_ne2000_update_intr(sc); break; }
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